論文 - 石黒　仁揮

A Discrete-Time Model for Frequency Modulated Charge Pumps with Synchronized Controller

Tan Y., Ishikuro H.

Midwest Symposium on Circuits and Systems （Midwest Symposium on Circuits and Systems）  2020-August   929 - 932 2020年08月

ISSN  9781538629161

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© 2020 IEEE. This paper presents a discrete-time based approach for frequency modulated charge pumps with synchronized controller. In order to handle the varying frequency, this paper first introduced a method to calculate the output voltage of an open-loop charge pump with predefined frequencies, which is improved from a fixed frequency open-loop model verified in previous research. Then a closed-loop model is proposed for synchronized frequency controllers. An algorithm is hence created from the closed-loop model to simulate the output of charge pumps. The simulation result shows a competitive accuracy and much faster speed when comparing it with transistor level simulations. Overall, this paper demonstrated its value in terms of modeling the frequency modulated charge pumps and hence assisted the top-down design flow.

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A Wide Input-Range, Low-Power and Highly Flexible 18 Bit Time-to-Digital Converter with Compact Differential Circuit Topology

Toth P., Ishikuro H.

Midwest Symposium on Circuits and Systems （Midwest Symposium on Circuits and Systems）  2020-August   937 - 940 2020年08月

ISSN  9781538629161

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© 2020 IEEE. This paper presents a wide-dynamic-range high-resolution time-domain converter concept tailored for low-power sensor interfaces. The unique system structure applies different techniques to reduce circuit complexity, power consumption, and noise sensitivity. A multi-cycle concept, which allows a virtual delay line extension, is applied to achieve high resolution down to 1 ns. At the same time, it expands the dynamic range drastically up to 2.35 ms. Moreover, individually tunable delay elements in the range of 1 ns to 12 ns allow on the one hand on-demand flexible operation in a low- or high-resolution mode for smart sensing applications and flexible power control. On the other hand, delay stage mismatch calibration. The concept of this paper is evaluated through both simulation and hardware by a custom-designed PCB using commercially available components. An HDL state machine operates as control logic on a generic FPGA. The presented concept is highly suitable for on-chip integration.

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A digital-to-resistance converter with an automatic offset calibration method for evaluating dynamic performance of resistive sensor readout circuits

Nakagawa S., Miyazaki T., Ishikuro H.

I2MTC 2020 - International Instrumentation and Measurement Technology Conference, Proceedings （I2MTC 2020 - International Instrumentation and Measurement Technology Conference, Proceedings）  2020年05月

ISSN  9781728144603

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© 2020 IEEE. In this paper, a digital-to-resistance converter (DRC) with automatic offset calibration circuits is proposed. This circuit is used to evaluate the dynamic performance of resistive sensor readout circuits. The proposed DRC consists of a digital-to-analog converter, an analog multiplier, a fixed-value reference resistor, and current sources. A wide-range resistance changing at high frequency is achieved with the proposed DRC. In order to minimize the resistance error caused by the offset voltage of op-amps, an automatic offset calibration method is proposed. This developed prototype DRC achieved 96.3 dB dynamic range, 56.1 dB SNDR at 10kHz, and a maximum operating frequency is 100kHz.

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A linearity testing of cascaded analog mixed-signal blocks using SEIR method

Ishikawa T., Pai C.W., Ishikuro H.

I2MTC 2020 - International Instrumentation and Measurement Technology Conference, Proceedings （I2MTC 2020 - International Instrumentation and Measurement Technology Conference, Proceedings）  2020年05月

ISSN  9781728144603

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© 2020 IEEE. This paper proposes a method to separate distortions of the input signal, amplifier, and analog-to-digital converter (ADC), which are cascaded blocks in the testing of an analog front-end system. The proposed technique extends the stimulus error identification and removal (SEIR) method to separate the low-quality input test signal, the nonlinearity of amplifier and ADC. The system model was built by using MATLAB/Simulink, and the nonlinearity of the input signal with distortion, amplifier, and ADC were successfully separated. With a 12-bit ADC, the estimation error of each block is less than 1 LSB in the simulation, and the proposed method was verified by measurement. The relations between the estimation error, calculation cost and each parameter in the proposed method are systematically studied.

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Low-Power and ppm-Level Multimolecule Detection by Integration of Self-Heated Metal Nanosheet Sensors

Tanaka T., Yanagida T., Uchida K., Tabuchi K., Tatehora K., Shiiki Y., Nakagawa S., Takahashi T., Shimizu R., Ishikuro H., Kuroda T.

IEEE Transactions on Electron Devices （IEEE Transactions on Electron Devices）  66 （ 12 ） 5393 - 5398 2019年12月

ISSN  00189383

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© 1963-2012 IEEE. H2 and NH3 detection with low power consumption was demonstrated by integrated chemiresistive Pt and PtRh nanosheet sensors on glass substrates. The self-heating effects realized low power and local heating of metal nanosheet sensors, enabling the integration of sensors with different operating temperatures. Based on different resistance changes in Pt and PtRh nanosheets toward H2 and NH3, the concentration of each gas was detected from a gas mixture by consuming around 1-mW power. For decreasing the power consumption and further integration of sensors, sensor scaling and pulsed operations were numerically and experimentally studied. In addition to good connectivity of metal nanosheet sensors to large-scale integration (LSI) circuits, improvements of the power consumption by sensor scaling were proven. The pulsed operations required for integrated sensor arrays maintained a sensor response, or a resistance change, of approximately 60%, even when the power consumption was reduced by 20%.

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High-resolution auto-balancing wheatstone-bridge with successive approximation of Δ Σ-Modulated digitally controlled variable resistor

Miyazaki T., Nakagawa S., Ishikuro H.

2019 26th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2019 （2019 26th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2019）     474 - 477 2019年11月

ISSN  9781728109961

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© 2019 IEEE. This paper describes a high-resolution, highly linear, low power amp-less sensor interface. A Wheatstone-bridge with ΔΣ-modulated digitally controlled variable resistor is proposed. The proposed bridge is automatically balanced by successive approximation (SA) of the digitally controlled resistor, which can eliminate power consuming amplifiers and ADCs. To overcome conversion speed limitation caused by settling time of each SA step, the output differential voltage of the bridge is shorted in advance to the comparison phase of each SA step. A developed prototype system achieved 9.68 bit resolution in target resistance range of three orders of magnitude and conversion speed improvement by 66%.

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Digital Amplifier: A Power-Efficient and Process-Scaling Amplifier for Switched Capacitor Circuits

Yoshioka K., Sugimoto T., Waki N., Kim S., Kurose D., Ishii H., Furuta M., Sai A., Ishikuro H., Itakura T.

IEEE Transactions on Very Large Scale Integration (VLSI) Systems （IEEE Transactions on Very Large Scale Integration (VLSI) Systems）  27 （ 11 ） 2575 - 2586 2019年11月

ISSN  10638210

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© 1993-2012 IEEE. To realize high-resolution pipelined and pipelined-SAR analog-to-digital-converters (ADCs), an accurate residue amplifier is necessary. However, realizing such an amplifier in scaled CMOS is challenging due to the worsened transistor characteristics. Prior works focused on gain calibration techniques to mitigate the use of low-gain amplifiers, in return of system complexity and prolonged startups. In this paper, we introduce a digital amplifier (DA) technique to realize power-efficient and accurate amplification in scaled CMOS. DA cancels out all errors (i.e., gain error, nonlinearity, incomplete settling, power supply noise, and thermal noise) of the low-gain amplifier by feedback based on successive approximation. The DA accuracy can be arbitrary set by configuring the number of bits in the DA capacitor digital-to-analog-converter; the amplifier gain is decoupled from the transistor intrinsic gain which is suitable for scaled CMOS integration. We also show that the power efficiency can be enhanced over conventional opamp-based designs with relaxed settling error requirements of DA-based multiplying digital-to-analog-converters (MDACs). Moreover, the circuit design of DA-based MDACs is further discussed. Measurement results of the calibration-free 0.7-V 12-bit 160-MS/s pipelined-SAR ADC implemented in 28-nm CMOS are reported. Without calibration, the ADC achieves signal-to-noise-and-distortion-ratio = 61.1 dB, figure-of-merit = 12.8 fJ/conv., which is over 3× improvement compared with conventional calibration-free high-speed pipelined ADCs. In addition, we evaluate the DA's process scalability by comparing the measured results of the DA-based MDAC prototyped in 65-and 28-nm CMOS. We observe 2×-3× improvement in speed, power, and area mainly resulting from the DA's process scalability.

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A High Accuracy Opamp-less Interface Circuit for 2-D Cross-Point Resistive Sensor Array with Switch Resistance Calibration

Shiiki Y., Ishikuro H.

Proceedings - APCCAS 2019: 2019 IEEE Asia Pacific Conference on Circuits and Systems: Innovative CAS Towards Sustainable Energy and Technology Disruption （Proceedings - APCCAS 2019: 2019 IEEE Asia Pacific Conference on Circuits and Systems: Innovative CAS Towards Sustainable Energy and Technology Disruption）     105 - 108 2019年11月

ISSN  9781728129402

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© 2019 IEEE. In this paper, a new readout method for a 2-D cross-point resistive sensor array with an opamp-less interface circuit is proposed. To avoid the readout inaccuracy caused by nonidealities of an opamp in the conventional readout circuit, our proposed circuit does not use any opamps. A switch resistance calibration technique is also proposed to remove effectively the negative effects of switch nonidealities, which bring high readout accuracy and wide scalability of a target resistive array. To evaluate the readout accuracy in the proposed method, simulation is carried out and the readout error less than 0.06% with 16-bit ADCs in 32×32 resistive array is achieved.

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A differential-ring-oscillator with up to 35 dBc/Hz phase noise improving amplitude feedback loop for ultra low power systems

Toth P., Ishikuro H.

2019 26th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2019 （2019 26th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2019）     350 - 353 2019年11月

ISSN  9781728109961

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© 2019 IEEE. This work presents a novel idea to dynamically control a differential ring oscillators biasing in order to improve the phase noise performance in the ultra low power domain. This proposed feedback system can be flexibly applied on any type of fully-differential ring oscillator with a tail current source. The following paper covers theoretical and simulative considerations to prove the feasibility of this idea. Finally measurements of a 180 nm standard CMOS integrated prototype system depict the implementability of this idea. A phase noise improvement of up to 35 dBc/Hz can be observed with an active control loop. Moreover, the tuning range of the implemented ring oscillator is extended by 434% in contrast to fixed bias operation. These values are measured at a minimum oscillation power consumption of 55 pW/Hz.

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Low-Power and ppm-Level Detection of Gas Molecules by Integrated Metal Nanosheets

Tanaka T., Tabuchi K., Tatehora K., Shiiki Y., Nakagawa S., Takahashi T., Shimizu R., Ishikuro H., Kuroda T., Yanagida T., Uchida K.

Digest of Technical Papers - Symposium on VLSI Technology （Digest of Technical Papers - Symposium on VLSI Technology）  2019-June   T158 - T159 2019年06月

ISSN  9784863487178

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© 2019 The Japan Society of Applied Physics. Ppm-level hydrogen and ammonia in air were recognized by low-power, integrated sensors consisting of catalytic metal nanosheets. Thermal energy necessary for catalytic reactions were given by Joule heating not by external heaters. The ther-mal-aware design of sensors reduces the power consumption to 0.14 mW. The low-power and small-area properties enable large-scale, on-chip integration of molecular sensors, which will be useful in IoT era. A sensor array was successfully connected to a platform with wireless connectivity.

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Low-Power and ppm-Level Detection of Gas Molecules by Integrated Metal Nanosheets

Tanaka T., Tabuchi K., Tatehora K., Shiiki Y., Nakagawa S., Takahashi T., Shimizu R., Ishikuro H., Kuroda T., Yanagida T., Uchida K.

IEEE Symposium on VLSI Circuits, Digest of Technical Papers （IEEE Symposium on VLSI Circuits, Digest of Technical Papers）  2019-June   T158 - T159 2019年06月

ISSN  9784863487185

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© 2019 JSAP. Ppm-level hydrogen and ammonia in air were recognized by low-power, integrated sensors consisting of catalytic metal nanosheets. Thermal energy necessary for catalytic reactions were given by Joule heating not by external heaters. The thermal-aware design of sensors reduces the power consumption to 0.14 mW. The low-power and small-area properties enable large-scale, on-chip integration of molecular sensors, which will be useful in IoT era. A sensor array was successfully connected to a platform with wireless connectivity.

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A high-resolution time-based resistance-to-digital converter with TDC and counter

Nakagawa S., Horikoshi K., Ishikuro H.

Midwest Symposium on Circuits and Systems （Midwest Symposium on Circuits and Systems）  2018-August   242 - 245 2019年01月

ISSN  9781538673928

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© 2018 IEEE This paper presents a high resolution time-based resistance-to-digital converter for amp-less high-precision sensor application. In order to solve the trade-off between resolution and bandwidth, a time-to-digital converter (TDC) is combined with a resistance-controlled-oscillator. The TDC is used to measure the fractional part of oscillation period, which realize a high resolution and conversion rate with moderate oscillation frequency. Proposed fractional period estimation technique reduce the required number of TDC and save power consumption. A prototype system was developed and 23 ppm resolution of resistance change at conversion rate of 5kSps was experimentally demonstrated.

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Interface with Opamp output-impedance calibration technique for a large integrated 2-D resistive sensor array

Shiiki Y., Ishikuro H.

Proceedings - IEEE International Symposium on Circuits and Systems （Proceedings - IEEE International Symposium on Circuits and Systems）  2019-May 2019年

ISSN  9781728103976

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© 2019 IEEE In this paper, a noble gas sensing system using a large scale integrated resistive sensor array and its interface system is introduced. Accuracy improvement, compared to conventional techniques, was achieved using our proposed opamp output impedance calibration technique. This technique makes it possible to use a low power, weak drivability opamp in the interface circuit. This paper shows the calibration method which reduces the sneak path current error from 83.6% to 1.2% through MATLAB simulations. A prototype system with 1,024 gas sensors integrated in one chip, discrete ICs of opamp, ADCs, and an FPGA was developed, and the effectiveness of the system is demonstrated.

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Arbitrary Magnetic Field Control Technique by Multi-Coil Transmitter Voltage Phase Shifting for Omni-Directional Free-Positioning Magnetic Resonance Wireless Power Delivery

Inada Y., Kawajiri T., Takeda U., Ishikuro H.

2018 48th European Microwave Conference, EuMC 2018 （2018 48th European Microwave Conference, EuMC 2018）     186 - 189 2018年11月

ISSN  9782874870514

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© 2018 European Microwave Association. This paper presents a technique to efficiently transfer power to devices regardless of their angle and position by using multi-coil transmitter with magnetic resonance coupling. The magnetic field at receiver coil can be arbitrary controlled by changing the phase of transmitter switching signal. The optimum phase can be determined by reversely transmitting signal from receiver to transmitter and detecting the phase of induced voltage of each transmitter coil. The effectiveness of proposed technique is demonstrated by electro-magnetic field simulation and measurements.

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Dual Transmitter Free-Positioning wireless Power Transfer System with Optimum Switching Phase Detection Technique

Takeda U., Inada Y., Kimoto Y., Kawajiri T., Ishikuro H.

IEEE MTT-S International Microwave Symposium Digest （IEEE MTT-S International Microwave Symposium Digest）  2018-June   1261 - 1264 2018年08月

ISSN  9781538650677

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© 2018 IEEE. A multi-transmitter wireless power transfer system with magnetic resonance coupling at 6.78MHz is presented. The switching phase of transmitter is controlled by a reverse signal transfer and optimum phase decision technique. The experimental results demonstrate the tracking ability of receiver coil angle change.

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Measurement time reduction technique for input referred noise of dynamic comparator

Ishijima Y., Nakagawa S., Ishikuro H.

IEEE International Conference on Microelectronic Test Structures （IEEE International Conference on Microelectronic Test Structures）  2018-March   202 - 205 2018年06月

ISSN  9781538650691

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© 2018 IEEE. Time reduction technique for the measurement of input referred noise of dynamic comparator is presented. By using binary search technique, the proposed method can reduce the measurement time of comparator input referred noise to (log2n)/n, where n is a required resolution. Experimental results obtained by the developed measurement system shows good correspondence with the simulated input referred noise.

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Design of resource sharing reconfigurable ΔΣ SAR-ADC

Ishizuka M., Yamada K., Ishikuro H.

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC （Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC）  2018-January   317 - 318 2018年02月

ISSN  9781509006021

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© 2018 IEEE. This paper presents an ADC with re-configurability between SAR-only mode and delta-sigma (ΔΣ assisted mode). The ΔΣ assisted mode brings resolution enhancement. Proposed ADC shares a capacitor array for SAR, feedback DAC, and integrator capacitor in ΔΣ loop, which can reduce the circuit size. The prototype ADC fabricated in 65-nm CMOS achieved SNDR of 44.35 dB at 32 MS/s and power consumption of 0.55 mW. The SNDR is improved to 62.9 dB by ΔΣ assisted mode.

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A 13.56-MHz Wireless Power Transfer System With Enhanced Load-Transient Response and Efficiency by Fully Integrated Wireless Constant-Idle-Time Control for Biomedical Implants

Huang C., Kawajiri T., Ishikuro H.

IEEE Journal of Solid-State Circuits （IEEE Journal of Solid-State Circuits）  53 （ 2 ） 538 - 551 2018年02月

ISSN  00189200

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© 2017 IEEE. In this paper, a complete wireless power transfer system with transmitter (TX) and receiver (RX) chips is presented. Both RX local and TX wireless output voltage regulations are achieved by the proposed constant-idle-time control without using any wires or additional discrete components, such as MCU, DAC, various kinds of controllers, and decoders, which were required in previous works. The system and circuitry design complexity is significantly reduced. Both TX and RX chips are fabricated in the TSMC 65-nm process with standard 2.5-V I/O devices, and the RX coil is fabricated using flexible printed circuits to demonstrate the performance for implantable applications. Up to 17.5% end-to-end total efficiency improvement is observed when enabling the wireless constant-idle-time controlled TX voltage regulation, and an instant load-transient response is also achieved. As a result, compared to previous works, this design achieves a higher total efficiency, a faster load-transient response, and a higher level of integration with a much lower system and circuitry design complexity.

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Open loop dynamic transmitter voltage scaling for fast response and wide load range power efficient WPT system

Kawajiri T., Ishikuro H.

IEEE MTT-S International Microwave Symposium Digest    315 - 317 2017年10月

ISSN  0149645X

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This paper presents a fast response wireless power delivery system with open loop dynamic transmitter voltage scaling technique to keep power efficiency in wide load range. In this technique, according to change of receiver side power consumption, the driving voltage of the transmitter (TX) coil is properly adjusted to control transmission power. The transmitting power and switching loss can be reduced in proportion to the square of the driving voltage. Therefore, it can improve power efficiency. To enhance power control speed, the driving voltage is not locally regulated but automatically determined by the feedback loop of the total WPT system. Fabricated test chips in 180-nm LDMOS process achieved maximum power efficiency of 50.9% when the output power is 0.5W. The output power ranges from 0.03W to 0.5W. The output voltage ripple is kept within 3.5% even when the output power is abruptly changed by one order of magnitude.

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Distortion and its suppression in low-power delta-sigma modulator

Ishikuro H.

Midwest Symposium on Circuits and Systems 2017-August   452 - 455 2017年09月

ISSN  15483746

　概要を見る

In this paper, effects of amplifier distortion in DT sigma-delta modulator are discussed. A second order modulator with single-bit quantizer is modeled and dead-zone effect of ring amplifiers in integrators is simulated by using MATLAB. For the evaluation of dead-zone effect on modulator distortion, test chip was fabricated in 65nm CMOS. SNDR of 62dB and 1MHz signal bandwidth was experimentally demonstrated at sampling frequency of 102.4MHz and power consumption of 1mW.

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