Papers - Amano, Hideharu
-
Power Optimization Methodology for Ultra Low Power Microcontroller with Silicon on Thin BOX MOSFET
H.Okuhara, Y.Fujita, K.Usami, H.Amano
IEEE Trans. on VLSI Systems 25 ( 4 ) 1578 - 1582 2017.04
Research paper (scientific journal), Joint Work, Accepted
-
NAMACHA: A software edevelopment environment for a mutli-chip convolutional network accelerator
#H <T.Ohkubo, R.Takata, R.Sakamoto, M.Kondo, H.Amano/U>
CATA2017, 2017.03
Research paper (international conference proceedings), Joint Work, Accepted
-
Scalable Networks-on-Chip with Elastic Links Demarcated by Decentralized Routers
R.Yasudo, H.Matsutani, M.Koibuchi, H.Amano, T.Nakamura
IEEE Trans. on Computers 66 ( 4 ) 702 - 716 2017.03
Research paper (scientific journal), Joint Work, Accepted
-
High-Bandwidth Low-Latency Approximate Interconnection Networks
Daichi Fujiki, Kiyo Ishii, Ikki Fujiwara, Hiroki Matsutani, Hideharu Amano, Henri Casanova, Michihiro Koibuchi,
Proc. of the 23rd IEEE International Symposium on High-Performance Computer Architecture (HPCA'17) 2017.02
Research paper (international conference proceedings), Joint Work, Accepted
-
Novel Chips Stacking Methods to Extend Both Horizontally and Vertically for Many-Core Architectures with ThrouChip Interface
H.Nakahara, T.Ozaki, H.Matsutani, M.Koibuchi, H.Amano
IEICE Trans. on Information and Systems E99-D ( 12 ) 2871 - 2880 2016.12
Research paper (scientific journal), Joint Work, Accepted
-
“Variable Pipeline Structure for Coarse Grained Reconfigurable Array CMA
N.Ando, K.Masuyama, H.Okuhara, H.Amano,
Proc. of IEEE International Conference on Field Programmable Technologies 2016.12
Research paper (international conference proceedings), Joint Work, Accepted
-
An Inductive-Coupling Bus with Collision Detection Scheme Using Magnetic Field Variation for 3-D Network-on-Chips
J. Kadomoto, T. Miyata, H. Amano, T. Kuroda
Proc. of ASSCC2016 2016.12
Research paper (international conference proceedings), Joint Work
-
LOREN: A Scalable Routing Method for Layout-conscious Random Topologies
Ryuta Kawano, Hiroshi Nakahara, Ikki Fujiwara, Hiroki Matsutani, Michihiro Koibuchi, Hideharu Amano
Proc. of the 4th International Symposium on Computing and Networking (CANDAR), 2016.11
Research paper (international conference proceedings), Joint Work
-
Vertical Packet Switching Elevator Network Using Inductive Coupling ThruChip Interface
Akio Nomura, Hiroki Matsutani, Tadahiro Kuroda, Junichiro Kadomoto, Yusuke Matsushita, Hideharu Amano
Proc. of the 4th International Symposium on Computing and Networking (CANDAR) 2016.11
Research paper (international conference proceedings), Joint Work
-
On-the-fly data compression/decompression mechanism with ExpEther
Hideki Shimura, Takuji Mitsuishi, Masaki Kan, Takashi Yoshikawa, Hideharu Amano,
Proc. of the 4th International Symposium on Computing and Networking (CANDAR) 2016.11
Research paper (international conference proceedings), Joint Work
-
Acceleration of Full-PIC simulation on a CPU-FPGA tightly coupled environment
<Ryotaro Sakai, Naru Sugimoto, Takaaki Miyajima, Naoyuki Fujita, Hideharu Amano,
Proc. of IEEE 10th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC), 2016.09
Research paper (international conference proceedings)
-
Body Bias Grain Size Exploration for a Coarse Grained Reconfigurable Accelerator
Yusuke Matsushita, Hayate Okuhara, Koichiro Masuyama, Yu Fujita, Ryuta Kawano and Hideharu Amano
Proc. of the 26th The International Conference on Field-Programmable Logic and Applications (FPL), 2016.09
Research paper (international conference proceedings), Joint Work
-
An Operating System Guided Fine-Grained Power Gating Control Based on Runtime Characteristics of Applications
Atsushi Koshiba, Mikiko Sato, Kimiyoshi Usami, Hideharu Amano, Ryuichi Sakamoto, Masaaki Kondo, Hiroshi Nakamura and Mitaro Namiki
IEICE Trans. on Electronics E99-C ( 8 ) 926 - 035 2016.08
Research paper (scientific journal), Joint Work, Accepted
-
Multi-Voltage Variable Pipeline Routers with the Same Clock Frequency for Low-power Network-on-Chips Systems
Akram Ben Ahmed, Hiroki Matsutani, Michihiro Koibuchi, Kimiyoshi Usami, and Hideharu Amano
IEICE Trans. on Electronics E99-C ( 8 ) 909 - 917 2016.08
Accepted
-
Performance Evaluation of PEACH3: an FPGA switch for tightly coupled accelerators
Takahiro Kaneda, Chiharu Tsuruta, Toshihiro Hanawa and Hideharu Amano
Proc. of International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies (HEART2016), 2016.06
Research paper (international conference proceedings)
-
ACRO: Assignment of Channels in Reverse Order to Make Arbitrary Routing Deadlock-free
Ryuta Kawano, Hiroshi Nakahara, Seiichi Tade, Ikki Fujiwara, Hiroki Matsutani, Michihiro Koibuchi, and Hideharu Amano
15th IEEE/ACIS International Conference on Computer and Information Science(ICIS) 2016.06
Research paper (international conference proceedings)
-
Leveraging FDSOI through Body Bias Domain Partitioning and Bias Search
Johannes Maximilian Kuehn, Hideharu Amano, Oliver Bringmann, Wolfgang Rosenstiel
53nd Design Automation Conference(DAC) 2016.05
Research paper (international conference proceedings)
-
SOTB MOSFETを用いた汎用マイクロコントローラV850の動的ボディバイアス制御の検討
AMANO HIDEHARU
情報処理学会論文誌 57 ( 2 ) 708 - 717 2016.02
Research paper (scientific journal)
-
Efficient 3-D Bus Architectures for Inductive-Coupling ThruChip Interfaces
AMANO HIDEHARU
IEEE Transactions on VLSI Systems 24 ( 2 ) 493 - 506 2016.02
ISSN 1063-8210
-
A Fine-grained Power Gating Control on Linux Monitoring Power Consumption of Processor Functional Unit
AMANO HIDEHARU
IEICE Transactions on Electronics. E980-C ( 7 ) 559 - 568 2015.08
Research paper (scientific journal), Joint Work, Accepted