Papers - Kuroda, Tadahiro
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Analysis and optimization of BiCMOS gate circuits
T. Kuroda, Y. Sakata, and K. Matsuo,
IEEE Journal of Solid-State Circuits, vol. 29, no. 5 29 ( 5 ) 564-571 1994.05
Research paper (scientific journal), Joint Work
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Capacitor-free level-sensitive active pull-down ECL circuit with self-adjusting driving capability
T. Kuroda, T. Fujita, M. Noda, P. Thai, L. Yang, and D. Gray,
Symposium on VLSI Circuits, Dig. Tech. Papers 29-30 1993.06
Research paper (scientific journal), Joint Work
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A 51k-gate low power ECL gate array family with metal-compiled and embedded SRAM
D. Gray, D. Beeson, B. Davis, D. Hutchings, P. Thai, T. S. Wong, T. Kuroda, M. Nakamura, and M. Noda,
in Proc. IEEE Custom Integrated Circuits Conference (CICC’93) 23.4.1-23.4.4 1993.05
Research paper (scientific journal), Joint Work
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Automated Bias Control (ABC) circuit for high-performance VLSI's
T. Kuroda, T. Fukunaga, K. Matsuo, K. Kasai, A. Hirata, S. Fujii, M. Kimura, and H. Suzuki,
IEEE Journal of Solid-State Circuits, vol. 27, no. 4 27 ( 4 ) 641-648 1992.04
Research paper (scientific journal), Joint Work
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0.5um BiCMOS standard-cell macros including 0.5W 3ns register file and 0.6W 5ns 32kB cache
Hiroyuki Hara, Takayasu Sakurai, Tetsu Nagamatsu, Shin'ichi Kobayashi, Katsuhiro Seta, Hiroshi Momose, Yoichirou Niitsu, Hiroyuki Miyakawa, Tadahiro Kuroda, Kouji Matsuda, Yoshinori Watanabe, Fumihik,
IEEE International Solid-State Circuits Conference (ISSCC’92), Dig. Tech. Papers 46-47 1992.02
Research paper (scientific journal), Joint Work
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Automated Bias Control (ABC) circuit for high-performance VLSIs
T. Kuroda, T. Fukunaga, K. Matsuo, K. Kasai, A. Hirata, S. Fujii, M. Kimura, and H. Suzuki,
Symposium on VLSI Circuits, Dig. Tech. Papers 15-16 1991.06
Research paper (scientific journal), Joint Work
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Analysis and optimization of BiCMOS gate circuits
T. Kuroda, Y. Sakata, and K. Matsuo,
in Proc. IEEE International Symposium on Circuits and Systems (ISCAS’91) 2112-2115 1991.06
Research paper (scientific journal), Joint Work
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Unified design methodology and device architecture for multi-generation ASIC applications
T. Kuroda, H. Suzuki, H. Akiba, T. Aoki, T. Shigematsu, and K. Kawagai,
in Proc. IEEE Custom Integrated Circuits Conference (CICC’88) 25.7.1-25.7.4 1988.05
Research paper (scientific journal), Joint Work
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A high performance scalable standard cell library with true second sourcing
G. Buurma, P. Michel, and T. Kuroda,
Proc. IEEE Custom Integrated Circuits Conference (CICC’87) 241-244 1987.05
Research paper (scientific journal), Joint Work
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P-well/N-well compatible CMOS processing for ASIC applications
T. Kuroda, H. Akiba, H. Suzuki, and T. Aoki,
International Conference on Solid State Devices and Materials (SSDM’86), Dig. Tech. Papers 57-60 1986.08
Research paper (scientific journal), Joint Work