Papers - Kuroda, Tadahiro
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ThruChip Interfaceを用いたバスにおける衝突検知
KURODA TADAHIRO
情報処理学会 全国大会 2018.03
Research paper (other academic)
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ビルディングブロック型計算システムプロジェクトの報告
KURODA TADAHIRO
情報処理学会 全国大会 2018.03
Research paper (other academic)
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ThruChip Interfaceを用いたコア間ネットワーク
KURODA TADAHIRO
情報処理学会 全国大会 2018.03
Research paper (other academic)
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マルチコア積層システムCube-2の実装と評価,
KURODA TADAHIRO
情報処理学会 全国大会 2018.03
Research paper (other academic)
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ThruChip Interfaceの設計自動化
KURODA TADAHIRO
情報処理学会 全国大会 2018.03
Research paper (other academic)
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QUEST: A 7.49TOPS Multi-Purpose Log-Quantized DNN Inference Engine Stacked on 96MB 3D SRAM Using Inductive-Coupling Technology in 40nm CMOS
KURODA TADAHIRO
IEEE SSCS Japan Chapter/Kansai Chapter Technical Seminar 2018.02
Research paper (conference, symposium, etc.), Joint Work
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QUEST: A 7.49TOPS Multi-Purpose Log-Quantized DNN Inference Engine Stacked on 96MB 3D SRAM Using Inductive-Coupling Technology in 40nm CMOS
KURODA TADAHIROK. Ueyoshi, K. Ando, K. Hirose, S. Takamaeda-Yamazaki, J. Kadomoto, T. Miyata, M. Hamada, T. Kuroda, and M. Motomura
IEEE International Solid-State Circuits Conference (ISSCC'18), Dig. Tech. Papers 216 - 217 2018.02
Research paper (international conference proceedings), Joint Work, Accepted
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Escalator Network for a 3D Chip Stack with Inductive Coupling ThruChip Interface
KURODA TADAHIROAkio Nomura, Yusuke Matsushita, Junichiro Kadomoto, Hiroki Matsutani, Tadahiro Kuroda, and Hideharu Amano
International Journal of Networking and Computing, 8 ( 1 ) 124 - 139 2018.01
Research paper (scientific journal), Joint Work, Accepted
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Convolutional Neural Network for Industrial Egg Classification
KURODA TADAHIRO
14th International SoC Design Conference (ISOCC 2017), Proceedings 67 - 68 2017.11
Research paper (international conference proceedings), Joint Work, Accepted
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Wireless Power Transfer to Stacked Modules for IoT Sensor Nodes
KURODA TADAHIROS. Yanagawa, R. Shimizu, M. Hamada, T. Shimizu, and T. Kuroda
14th International SoC Design Conference (ISOCC 2017), Proceedings 59 - 60 2017.11
Research paper (international conference proceedings), Joint Work, Accepted
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An Inductive-Coupling Link for 3-D Network-on-Chips,
KURODA TADAHIROJ. Kadomoto, H. Amano, and T. Kuroda
14th International SoC Design Conference (ISOCC 2017), Proceedings 150 - 151 2017.11
Research paper (international conference proceedings), Accepted
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A practical collision avoidance method for an inter-chip bus with wireless inductive Through Chip Interface
KURODA TADAHIROA. Nomura, J. Kadomoto, T. Kuroda, and H. Amano
International Symposium on Computing and Networking (CANDAR'17) 2017.11
Research paper (international conference proceedings), Accepted
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BRein Memory: A 13-Layer 4.2 K Neuron/0.8 M Synapse Binary/Ternary Reconfigurable In-Memory Deep Neural Network Accelerator in 65 nm CMOS
KURODA TADAHIRO
IEEE Symposium on VLSI Circuits, Dig. Tech. Papers C24 - C25 2017.06
Research paper (scientific journal), Joint Work
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A 6Gb/s Rotatable Non-Contact Connector with High-Speed/I2C/CAN/SPI Interface Bridge IC,
M. Haraguchi, A. Kosuge, T. Igarashi, S. Masaki, M. Sueda, M. Hamada, and T. Kuroda. KURODA TADAHIRO
IEEE Symposium on VLSI Circuits, Dig. Tech. Papers 150 - 151 2017.06
Research paper (scientific journal), Accepted
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誘導結合ワイヤレスチップ間接続のIP化
KURODA TADAHIRO
信学技報 (電子情報通信学会) 116 ( 365 ) 7 - 12 2016.12
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実装技術の現状と今後の展開
KURODA TADAHIRO
ロボット 233 1 - 2 2016.11
Single Work
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Analysis and Evaluation of Electromagnetic Interference between ThruChip Interface and LC-VCO
KURODA TADAHIROJ. Kadomoto, S. Hasegawa, Y. Kiuchi, A. Kosuge, and T. Kuroda
IEICE Trans. on Electronics E99-C ( 6 ) 659 - 662 2016.06
Research paper (scientific journal), Joint Work
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A 6 Gb/s 6 pJ/b 5mm-Distance Non-Contact Interface for Modular Smartphones Using Two-Fold Transmission Line Coupler and High EMC Tolerant Pulse Transceiver
KURODA TADAHIRO A. Kosuge, J. Kadomoto, and T. Kuroda,
IEEE Journal of Solid-State Circuits (JSSC) 51 ( 6 ) 1446 - 1456 2016.06
Research paper (scientific journal)
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Near-Field Coupling Integration Technology
KURODA TADAHIRO
ECS Transactions 72 ( 3 ) 83 - 91 2016.05
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An Inductively-Powered Wireless Solid-State Drive System with Merged Error Correction of High-Speed Wireless Data Links and NAND Flash Memories
KURODA TADAHIRO A. Kosuge, J. Hashiba, T. Kawajiri, S. Hasegawa, T. Shidei, H.Ishikuro, T. Kuroda, and K. Takeuchi,
IEEE Journal of Solid-State Circuits (JSSC) 51 ( 04 ) 1041-1050 2016.04
Research paper (scientific journal), Joint Work
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A 280Mb/s In-Vehicle LAN System Using Electromagnetic Clip Connector and High-EMC Transceiver
KURODA TADAHIRO
IEEE Transactions on Circuits and Systems-I: Regular Papers (TCAS-I) 68 ( 2 ) 265 - 275 2016.02
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Efficient 3-D Bus Architecture for Inductive-Coupling ThruChip Interface,
KURODA TADAHIRO
IEEE Transaction on Very Large Scale Integration (VLSI) Systems 24 ( 2 ) 2016.02
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A Study of Physical Design Guidelines in ThruChip Inductive Coupling Channel,
KURODA TADAHIRO
EICE Trans. on Fundamentals E98-A ( 12 ) 2584 - 2591 2015.12
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半導体ディジタルロゼッタストーン
KURODA TADAHIRO
電子情報通信学会誌 98 ( 12 ) 1057 - 1062 2015.12
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Analysis and Design of an 8.5-Gb/s/link Multi-Drop Bus Using Energy-Equipartitioned Transmission Line Couplers,
KURODA TADAHIRO
EEE Transactions on Circuits and Systems-I: Regular Papers (TCAS-I) vol. 62 ( no. 8, ) 2122 - 2131 2015.08
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Relay Transmission Thruchip Interface with Low-Skew 3D Clock Distribution Network
KURODA TADAHIRO
EICE TRANSACTIONS on Electronics Vol.E98-C ( No.4, ) 322 - 332 2015.05
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A 6Gb/s 6pJ/b 5mm-Distance Non-Contact Interface for Modular Smartphones Using Two-Fold Transmission Line Couplar and EMC-Qualified Pulse Transceiver
KURODA TADAHIRO
IEEE International Solid-State Circuits Conference(ISSCC'15) 176 - 177 2015.02
Research paper (international conference proceedings)
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A 6.5Gb/s Shared Bus using Electromagnetic Connectors for Downsizing and Lightening Satellite Processor System by 60%
KURODA TADAHIRO
IEEE International Solid-State Circuits Conference (ISSCC'15) 434 - 435 2015.02
Research paper (international conference proceedings), Joint Work
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Circuit and Package Design for 44GB/s Inductive-Coupling DRAM/SoC Interface
KURODA TADAHIRO
20th Asia and South Pacific Design Automation Conference(ASP-DAC'15) 44 - 45 2015.01
Research paper (international conference proceedings)
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Design and Analysis for ThruChip Design for Manufacturing(DFM)
KURODA TADAHIRO
20th Asia and South Pacific Design Automation Conference(ASP-DAC'15) 46 - 47 2015.01
Research paper (international conference proceedings)
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Circuit and Device Interactions for 3D Integration Using Inductive Coupling
KURODA TADAHIRO
2014 IEEE International Electron Devices Meeting (IEDM'14) 18.6 2014.12
Research paper (international conference proceedings)
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近接場接合を用いたLSIとモジュールの三次元集積
KURODA TADAHIRO
電子情報通信学会論文誌 378 - 385 2014.11
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車載LAN向け非接触コネクタおよび高ノイズ耐性送受信回路
KURODA TADAHIRO
電子情報通信学会技術研究報告 23 - 27 2014.10
Research paper (scientific journal)
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3D Integration by Inductive Coupling
KURODA TADAHIRO
IEEE Custom Integrated Circuits Conf. (CICC) 2014.09
Research paper (international conference proceedings)
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Low-Cost 3D Chip Stacking with ThruChip Wireless Connections
KURODA TADAHIRO
Hot Chips - A Symposium on High Performance Chips 2014.08
Research paper (international conference proceedings)
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A 352Gb/s Inductive-Coupling DRAM/SoC Interface Using Overlapping Coils with Phase Division Multiplexing and Ultra-Thin Fan-Out Wafer Level Package
KURODA TADAHIRO
IEEE Symposium on VLSI Circuits, Dig. Tech Papers 29 - 30 2014.06
Research paper (international conference proceedings)
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3-D NoC with Inductive-Coupling Links for Building-Block SiPs
KURODA TADAHIRO
IEEE Transactions on Computers 63 ( 3 ) 748 - 763 2014.03
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A 0.15-mm-Thick Noncontact Connector for MIPI Using a Vertical Directional Coupler
KURODA TADAHIRO
IEEE Journal of Solid-State Circuits(JSSC) 49 ( 1 ) 223 - 231 2014.01
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実装インタコネクトの課題
KURODA TADAHIRO
日本信頼性学会誌 35 ( 8 ) 469 - 469 2013.12
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A Scalable 3D Heterogeneous Mulicore with an Inductive Thru Chip Interface
KURODA TADAHIRO
IEEE Micro 33 ( 6 ) 6 - 15 2013.12
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非接触インタコネクトのアプリケーション
KURODA TADAHIRO
日本信頼性学会誌 35 ( 8 ) 473 - 473 2013.12
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A 3 Gbps Non-Contact Inter-Module Link with Twofold Transmission Line Couplers and Low Frequency Compensation Equalizer
KURODA TADAHIRO
Japanese Journal of Applied Physics(JJAP) 52 ( 4 ) 2013.04
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Near-Field Wireless Connection for 3D-System Integration,"
KURODA TADAHIRO
NPIE-JST Workshop "Intelligent Electronics", 2013.03
Single Work
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A 12-Gb/s Non-Contact Interface With Coupled Transmission Lines,
KURODA TADAHIRO T. Takeya, L. Nan, S. Nakano, N. Miura, H. Ishikuro, and T. Kuroda,
IEEE Journal of Solid-State Circuits (JSSC) 48 ( 3 ) 790-800 2013.03
Research paper (scientific journal), Single Work
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Symbol-Rate Clock Recovery for Integrating DFE Receivers,
KURODA TADAHIRO T. Takeya, and T. Kuroda,
IEICE Trans. on Fundamentals E96-A ( 3 ) 705-712 2013.03
Research paper (scientific journal), Single Work
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A 4-10bit, 0.4-1V Power Supply, Power Scalable Asynchronous SAR-ADC in 40nm-CMOS with Wide Supply Voltage Range SAR Controller,
KURODA TADAHIRO A. Shikata, R. Sekimoto, K. Yoshioka, T. Kuroda, and H. Ishikuro, "A 4-10bit, 0.4-1V Power Supply, Power Scalable Asynchronous SAR-ADC in 40nm-CMOS with Wide Supply Voltage Range SAR Controller," IEICE Trans. on Fundamentals, vol. E96-A, no. 2, Feb. 2013.
IEICE Trans. on Fundamentals E96-A ( 2 ) 2013.02
Research paper (scientific journal), Single Work
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半導体デジタルロゼッタストーンの発表から学んだこと,
KURODA TADAHIRO
科学技術未来戦略ワークショップ「超長期保存メモリ・システムの開発」 2012.11
Single Work
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近接場ワイヤレス通信が拓く超低電力3次元集積システム
KURODA TADAHIRO
CREST研究成果公開シンポジウム「持続可能な情報社会、成長する産業創出を目指して」 2012.11
Single Work
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世界を変えるVLSI技術
KURODA TADAHIRO
第21回理工学部市民講座「エレクトロニクスの拓く未来」 2012.06
Research paper (other academic), Single Work
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A 9-bit 100MS/s SARADC with Digitally Assisted Background Calibration,
KURODA TADAHIRO X. Zhu, Y. Chen, S. Tsukamoto and T. Kuroda,
IEICE Trans. on Electronics E95-C ( 6 ) 1026 -1034 2012.06
Research paper (scientific journal), Single Work
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A 1TB/s 1pJ/b 6.4mm2/TB/s QDR Inductive-Coupling Interface Between 65-nm CMOS Logic and Emulated 100-nm DRAM,
KURODA TADAHIRO N. Miura, M. Saito, and T. Kuroda,
IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS) 2 ( 2 ) 249-256 2012.06
Research paper (scientific journal), Joint Work
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近接場ワイヤレス通信が拓く三次元実装
KURODA TADAHIRO
エレクトロニクス実装学会誌 15 ( 4 ) 231-235 2012.05
Research paper (scientific journal), Single Work
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A 0.5 V 1.1 MS/sec 6.3 fJ/conversion-step SAR-ADC with tri-level comparator in 40 nm CMOS,"
KURODA TADAHIRO A. Shikata, R. Sekimoto, T. Kuroda, and H. Ishikuro,
IEEE Journal of Solid-State Circuits (JSSC) 47 ( 4 ) 1022-1030 2012.04
Research paper (scientific journal), Joint Work
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Asynchronous Pulse Transmitter for Power Reduction in Inductive-Coupling Link,
KURODA TADAHIRO M. Saito, N. Miura, and T. Kuroda,
Japanese Journal of Applied Physics(JJAP) 51 ( 2 ) 2012.04
Research paper (scientific journal), Joint Work
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6W/25mm2 Wireless Power Transmission for Non-contact Wafer-Level Testing,
KURODA TADAHIRO A. Radecki, H.Chung, Y. Yoshida, N. Miura, T. Shidei, H. Ishikuro and T. Kuroda,
IEICE Trans. on Electronics E95-C ( 4 ) 668-676 2012.04
Research paper (scientific journal), Joint Work
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"A 7Gb/s/Link Non-Contact Memory Module for Multi-Drop Bus System Using Energy-Equipartitioned Coupled Transmission Line,"
KURODA TADAHIROW. Yun, S. Nakano, W. Mizuhara, A. Kosuge, N. Miura, H. Ishikuro, and T. Kuroda,
IEEE International Solid-State Circuits Conference (ISSCC'12), Dig. Tech. Papers, pp. 52-53, 2012.02
Research paper (scientific journal), Single Work
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"A 2Gb/s 150mW UWB Direct-Conversion Coherent Transceiver with IQ-Switching Carrier-Recovery Scheme,"
KURODA TADAHIROT. Abe, Y. Yuan, H. Ishikuro, and T. Kuroda,
IEEE International Solid-State Circuits Conference (ISSCC'12), Dig. Tech. Papers, pp. 442-443, 2012.02
Research paper (scientific journal), Joint Work
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"Rotary coding for power reduction and S/N improvement in inductive-coupling data communication,"
KURODA TADAHIROA. Radecki, N. Miura, H. Ishikuro, and T. Kuroda,
IEEE Asian Solid-State Circuits Conference (A-SSCC'11), Dig. Tech. Papers, (pp. 205-208) 2011.11
Research paper (scientific journal), Joint Work
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"A 0.6V Noise Rejectable All-Digital CDR with Free Running TDC for a Pulse-Based Inductive-Coupling Interface,"
KURODA TADAHIROW-J. Yun, H. Ishikuro, and T. Kuroda,
IEEE Asian Solid-State Circuits Conference (A-SSCC'11), Dig. Tech. Papers, pp. 145-148 2011.11
Research paper (scientific journal), Single Work
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"Analysis and Techniques for Mitigating Interface From Power/Signal Lines and to SRAM Circuits in CMOS Inductive-Coupling Link for Low-Power 3-D System Integration,"
KURODA TADAHIROK. Niitsu, Y. Sugimori, Y. Kohama, K. Osada, N. Irie, H. Ishikuro and T. Kuroda
IEEE Transaction on Very Large Scale Integration (VLSI) Systems, 19 ( 10 ) 2011.10
Research paper (scientific journal), Joint Work
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"A 40nm 50S/s - 8MS/s Ultra Low Voltage SAR ADC with Timing Optimized Asynchronous Clock Generator,"
KURODA TADAHIROR. Sekimoto, A. Shikata, T. Kuroda, and H. Ishikuro,
2011 European Solid-State Circuits Conference (ESSCIRC'11), Dig. Tech. Papers, pp. 12-16 2011.09
Research paper (scientific journal), Joint Work
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"A 0.5V 1.1MS/sec 6.3fJ/conversion-step SAR-ADC with Tri-Level Comparator in 40nm CMOS,"
KURODA TADAHIROA. Shikata, R. Sekimoto, T. Kuroda, and H. Ishikuro,
IEEE Symposium on VLSI Circuits, Dig. Tech. Papers, pp. 262-263 2011.06
Research paper (scientific journal), Joint Work
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"A Battery-less WiFi-BER modulated data transmitter with ambient radio-wave energy harvesting,"
KURODA TADAHIROH. Ishizaki, H. Ikeda, Y. Yoshida, T. Maeda, T. Kuroda, and M. Mizuno,
IEEE Symposium on VLSI Circuits, Dig. Tech. Papers, 162-163 2011.06
Research paper (scientific journal), Joint Work
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"A 0.5V 1.1MS/sec 6.3fJ/conversion-step SAR-ADC with Tri-Level Comparator in 40nm CMOS,"
KURODA TADAHIROA. Shikata, R. Sekimoto, T. Kuroda, and H. Ishikuro,
IEEE Symposium on VLSI Circuits, Dig. Tech. Papers, 262-263 2011.06
Research paper (scientific journal), Joint Work
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"A Vertical Bubble Flow Network using Inductive-Coupling for 3-D CMPs,"
KURODA TADAHIRO H. Matsutani, Y. Take, D. Sasaki, M. Kimura, Y. Ono, Y. Nishiyama, M. Koibuchi, T. Kuroda, and H. Amano,
Proc. of the 5th ACM/IEEE International Symposium on Networks-on-Chip (NOCS'11) 49-56, 2011.05
Research paper (scientific journal), Joint Work
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"A 0.55V 10fJ/bit Inductive-Coupling Data Link and 0.7V 135fJ/Cycle Clock Link with Dual-Coil Transmission Scheme,"
KURODA TADAHIRON. Miura, T. Shidei, Y. Yuan, S. Kawai, K. Takatsu, Y. Kiyota, Y. Asano, and T. Kuroda,
IEEE Journal of Solid-State Circuits (JSSC), 46 ( 4 ) 965-973 2011.04
Research paper (scientific journal), Single Work
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ワイヤレス給電の将来展望
KURODA TADAHIRO
OHM 4-5 2011.03
Research paper (scientific journal), Single Work
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"Human Action Recognition Using Wireless Wearable In-Ear Microphone,"
KURODA TADAHIROJ. Nishimura and T. Kuroda,
IEEJ, vol.131, no.9, Sec.C, pp.1570-1576 2011
Research paper (scientific journal), Joint Work
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"A Battery-less WiFi-BER modulated data transmitter with ambient radio-wave energy harvesting,"
KURODA TADAHIROH. Ishizaki, H. Ikeda, Y. Yoshida, T. Maeda, T. Kuroda, and M. Mizuno,
IEEE Symposium on VLSI Circuits, Dig. Tech. Papers 162-163 2011
Research paper (scientific journal), Joint Work
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A 30Gb/s/link 2.2Tb/s/mn2 Inductively-Coupled Injection-Locking CDR
KURODA TADAHIRO
IEEE SSCS Kansai Chapter Technical Seminar 2010.12
Single Work
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近接場ワイヤレス通信が拓く3次元実装
KURODA TADAHIRO
NEW MEDIA ( 2011-1 ) 27 2010.12
Research paper (scientific journal), Single Work
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A 9-bit 100 MS/s 1.46-mW Tri-Level SAR ADC in 65nm CMOS
KURODA TADAHIRO
IEICE Trans. Fundamentals E93-A ( 12 ) 2010.12
Research paper (conference, symposium, etc.), Single Work
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Multiaxial Haar-Like Feature and Compact Cascaded Classifier for Versatile Recognition
KURODA TADAHIRO
IEEE Sensors Journal 10 ( 11 ) 1786-1795 2010.11
Research paper (scientific journal), Single Work
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ワイヤレス給電
KURODA TADAHIRO
電子情報通信学会誌 93 ( 11 ) 964-967 2010.11
Research paper (scientific journal), Single Work
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Wireless proximity interface with a pulse-based inductive coupling technique
KURODA TADAHIRO
IEEE Communications Magazine 48 ( 10 ) 192-199 2010.10
Research paper (scientific journal), Single Work
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An Inductive-Coupling DC Voltage Transceiver for Highly-Parallel Wafer-Level Testing
KURODA TADAHIRO
IEEE Journal of Solid-State Circuits (JSSC) 45 ( 10 ) 2057-2065 2010.10
Research paper (conference, symposium, etc.), Single Work
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47% Power Reduction and 91% Area Reduction in Inductive-Coupling Programmable Bus for NAND Flash Memory Stacking
KURODA TADAHIRO
IEEE Circuits and SystemsI(TCAS-I) 57 ( 9 ) 2269-2278 2010.09
Research paper (conference, symposium, etc.), Single Work
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Modeling and Experimental Verification of Misalignment Tolerance in Inductive-Coupling Inter-Chip Link for Low-Power 3-D System Integration
KURODA TADAHIRO
IEEE Trans. On Very Large Scale Integration (VLSI) Systems 18 ( 8 ) 1238-1243 2010.08
Research paper (conference, symposium, etc.), Single Work
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2025年の半導体技術と産業と日本
KURODA TADAHIRO
第37回STARKアドバンスト講座 141-149 2010.07
Single Work
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高性能・超低電力短距離ワイヤレス可動情報システムの創出
KURODA TADAHIRO
情報処理 Vol.51 861-869 2010.07
Single Work
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Human Activity Recognition from Environmental Backgrounds Sounds for Wireless Sensor Networks
KURODA TADAHIRO
IEEJ 130 ( 4 ) 565-572 2010.04
Research paper (conference, symposium, etc.), Single Work
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"Versatile Recognition Using Haar-Like Feature and Cascaded Classifier,"
KURODA TADAHIRO J. Nishimura and T. Kuroda,
IEEE Sensors Journal, 10 942-951 2010.03
Research paper (scientific journal), Single Work
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"Architecture Design of Versatile Recognition Processor for Sensornet Applications,"
KURODA TADAHIRO Y. Hori, Y. Hanai, J. Nishimura and T. Kuroda,
IEEE Micro, 29 ( 6 ) 44-57 2009.11
Research paper (scientific journal), Joint Work
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"A 107-pJ/bit 100-kb/s 0.18-um Capacitive-Coupling Transceiver With Data Edge Signaling and DC Power-Free Pulse Detector for Printable Communication Sheet,"
KURODA TADAHIRO L. Liu, M. Takamiya, T. Sekitani, Y. Noguchi, S. Nakano, K. Zaitsu, T.Kuroda, T. Someya, and T. Sakurai,
IEEE Trans. On Circuits and Systems I, 56 ( 11 ) 2511-2518 2009.11
Research paper (scientific journal), Joint Work
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科学技術・研究開発の国際比較 2009年版
KURODA TADAHIRO
科学技術振興機構 12-13 2009.05
Research paper (scientific journal), Single Work
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A High-Speed Inductive-Coupling Link with Burst Transmission
N. Miura, Y. Kohama, Y. Sugimori, H. Ishikuro, T. Sakurai, and T. Kuoda
IEEE Journal of Solid-State Circuits (JSSC) 44 ( 3 ) 947-955 2009.03
Research paper (scientific journal), Joint Work
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A 750 Mb/s, 12 pJ/b, 6-to-10 GHz CMOS IR-UWB Transmitter With Embedded On-Chip Antenna
V. Kulkarni, M. Muqsith, K. Niitsu, H. Ishikuro and T. Kuroda,
IEEE Journal of Solid-State Circuits (JSSC) 44 ( 2 ) 394-403 2009.02
Research paper (scientific journal), Joint Work
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A 2 Gb/s Bi-Directional Inter-Chip Data Transceiver With Differential Inductors for High Density Inductive Channel Array
Y. Yoshida, N. Miura, and T. Kuroda,
IEEE Journal of Solid-State Circuits (JSSC) 43 ( 11 ) 2363-2369 2008.10
Research paper (scientific journal), Joint Work
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3次元実装のための低電力・広帯域誘導結合通信
三浦典之,黒田忠広,
エレクトロニクス実装学会誌 11 ( 3 ) 174-181 2008.05
Research paper (scientific journal), Joint Work
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Chip-to-Chip Power Delivery by Inductive Coupling with Ripple Canceling Scheme
Y. Yuxiang, Y. Yoshida, N. Yamagish, and T. Kuroda,
Japanese Journal of Applied Physics (JJAP) 47 ( 4 ) 2008.04
Research paper (scientific journal), Joint Work
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20-GHz Quadrature Injection-Locked LC Dividers With Enhanced Locking Range
T. Shibasaki, H.Tamura, K. Kanda, H.Yamaguchi, J.Ogawa, and T. Kuroda,
IEEE Journal of Solid-State Circuits (JSSC) 43 ( 3 ) 610-618 2008.03
Research paper (scientific journal), Joint Work
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科学技術・研究開発の国際比較 2008年版
KURODA TADAHIRO
科学技術振興機構 8,22 2008.02
Research paper (scientific journal), Single Work
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A 0.14pJ/b Inductive-Coupling Transceiver with Digitally-Controlled Precise Pulse Shaping
N. Miura, H. Ishikuro, K. Niitsu, T. Sakurai, and T. Kuroda,
IEEE Journal of Solid-State Circuits (JSSC) 43 ( 1 ) 285-291 2008.01
Research paper (scientific journal), Joint Work
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A 40-44 Gb/s 3× Oversampling CMOS CDR/1:16 DEMUX
N. Nedovic, N. Tzartzanis, H. Tamura, F.M. Rotella, M. Wiklund, Y. Mizutani, Y. Okaniwa, T. Kuroda, J. Ogawa, and W.W. Walker,
IEEE Journal of Solid-State Circuits (JSSC) 42 ( 12 ) 2726-2735 2007.12
Research paper (scientific journal), Joint Work
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システムLSIの低電力技術
黒田忠広
電子情報通信学会誌 90 ( 11 ) 971-981 2007.11
Research paper (scientific journal), Single Work
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Inductive-Coupling Transceiver for 3D System Integrarion (invited)
N. Miura and T. Kuroda,
Proc. 2007 International Conference on Integrated Circuit Design and Technology (ICICDT) 172-175 2007.06
Research paper (scientific journal), Joint Work
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Human Activity Recognition from Environmental Background Sounds for Wireless Sensor Networks
Y. Zhan, S. Miura, J. Nishimura, and T. Kuroda,
IEEE International Conference on Networking, Sensing and Control (ICNSC2007) 307-312 2007.04
Research paper (scientific journal), Joint Work
-
Daisy Chain Transmitter for Power Reduction in Inductive-Coupling CMOS Link
K. Niitsu, N. Miura, M. Inoue, Y. Nakagawa, M. Tago, M. Mizuno, T. Sakurai, and T. Kuroda,
IEICE Trans. Electron. E90-C ( 4 ) 829-835 2007.04
Research paper (scientific journal), Joint Work
-
18-GHz Clock Distribution Using a Coupled VCO Array
T. Shibasaki, H. Tamura, K. Kanda, H. Yamaguchi, J. Ogawa, and T. Kuroda,
IEICE Trans. Electron. E90-C ( 4 ) 811-822 2007.04
Research paper (scientific journal), Joint Work
-
超低電力短距離ワイヤレス可動情報システム
電子情報通信学会誌
電子情報通信学会誌 (電子情報通信学会) 90 ( 3 ) 191-195 2007.03
Research paper (scientific journal), Single Work
-
A 0.14pJ/b Inductive-Coupling Inter-Chip Data Transceiver with Digitally-Controlled Precise Pulse Shaping
N. Miura, H. Ishikuro, T. Sakurai, and T. Kuroda,
IEEE Journal of Solid-State Circuits (JSSC) 264-265 2007.02
Research paper (scientific journal), Joint Work
-
An Attachable Wireless Chip Access Interface for Arbitrary Data Rate by Using Pulse-Based Inductive-Coupling through LSI Package
H. Ishikuro, S. Iwata, and T. Kuroda,
IEEE Journal of Solid-State Circuits (JSSC) 360-361,608 2007.02
Research paper (scientific journal), Joint Work
-
A 1Tb/s 3W Inductive-Coupling Transceiver Chip
N. Miura and T. Kuroda,
12th Asia and South Pacific Design Automation Conference (ASP-DAC 2007) 92-93 2007.01
Research paper (scientific journal), Joint Work
-
A 1Tb/s 3W Inductive-Coupling Transceiver for 3D-Stacked Inter-Chip Clock and Data Link
N. Miura, D. Mizoguchi, M. Inoue, K. Niitsu, Y. Nakagawa, M. Tago, M. Fukaishi, T. Sakurai, and T. Kuroda,
IEEE Journal of Solid-State Circuits (JSSC) 42 ( 1 ) 111-122 2007.01
Research paper (scientific journal), Joint Work
-
Crosstalk Countermeasures for High-Density Inductive-Coupling Channel Array
N. Miura, T. Sakurai, and T. Kuroda,
IEEE Journal of Solid-State Circuits (JSSC) 42 ( 2 ) 410-421 2007.01
Research paper (scientific journal), Joint Work
-
薄化チップが拓く新しい3次元実装非接触チップ間通信 (invited)
KURODA TADAHIRO
SEMICON Japan 2006 63-81 2006.12
Research paper (scientific journal), Single Work
-
Future Digital Link
T. Kuroda,
IEEE Asian Solid-State Circuits Conference (A-SSCC) 454 2006.10
Research paper (scientific journal), Single Work
-
チップ間無線データ通信技術 (invited)
KURODA TADAHIRO
システムデザイン・インテグレーション第177委員会合同研究会資料, シリコン超集積化システム第165委員会 67-86 2006.10
Research paper (scientific journal), Single Work
-
Perspective of Low-Power and High-Speed Wireless Inter-Chip Communications for SiP Integration (Plenary)
N. Miura and T. Kuroda,
2006 European Solid-State Circuits Conference (ESSCIRC) 3-6 2006.09
Research paper (scientific journal), Joint Work
-
科学技術・研究開発の国際比較 2006年版
KURODA TADAHIRO
科学技術振興機構 2006.07
Research paper (scientific journal), Single Work
-
インタコネクションと三次元集積 -回路技術からのアプローチ- (invited)
KURODA TADAHIRO
広島大学半導体技術シンポジウム予稿集 49-54 2006.06
Research paper (scientific journal), Single Work
-
A 0.79mm2 29mW Real-Time Face Detection Core
Y. Hori, M. Kusaka, and T. Kuroda,
Symposium on VLSI Circuits, Dig. Tech. Papers 188-189 2006.06
Research paper (scientific journal), Joint Work
-
A 20-GHz Injection-Locked LC Divider with a 25-% Locking Range
T. Shibasaki, H. Tamura, K. Kanda, H. Yamaguchi, J. Ogawa, and T. Kuroda,
Symposium on VLSI Circuits, Dig. Tech. Papers 212-213 2006.06
Research paper (scientific journal), Joint Work
-
Daisy Chain for Power Reduction in Inductive-Coupling CMOS Link
M. Inoue, N. Miura, K. Niitsu, Y. Nakagawa, M. Tago, M. Fukaishi, T. Sakurai, and T. Kuroda,
Symposium on VLSI Circuits, Dig. Tech. Papers 80-81 2006.06
Research paper (scientific journal), Joint Work
-
夢を形に、世界へ発信。
KURODA TADAHIRO
SEAJ Journal 2006. 5 No.102 ( 102 ) 35-37 2006.05
Research paper (scientific journal), Single Work
-
Resister-Transconductorハイブリッド回路を用いた20Gb/s同時双方向送受信回路
富田安基, 田村泰孝, 木船雅也, 小川淳二, 後藤公太郎, 黒田忠広,
電子情報通信学会技報 Vol. 106, No. 71, ICD2006-39 106 ( 71 ) 101-104 2006.05
Research paper (scientific journal), Joint Work
-
1Tb/s 3W チップ間誘導結合クロックデータトランシーバ
KURODA TADAHIRO
電子情報通信学会技報 Vol.106, No.71, ICD2006-22〜39 106 ( 71 ) 95-100 2006.05
Research paper (scientific journal), Joint Work
-
A 1Tb/s 3W Inductive-Coupling Transceiver for Inter-Chip Clock and Data Link
N. Miura, D. Mizoguchi, M. Inoue, K. Niitsu, Y. Nakagawa, M. Tago, M. Fukaishi, T. Sakurai, and T. Kuroda,
IEEE International Solid-State Circuits Conference (ISSCC'06), Dig. Tech. Papers 424-425 2006.02
Research paper (scientific journal), Joint Work
-
LSI回路設計技術
KURODA TADAHIRO
電子情報通信学会誌 Vol.89 No.2 89 ( 2 ) 96-101 2006.02
Research paper (scientific journal), Single Work
-
A 20Gb/s Bidirectional Transceiver Using a Resistor-Transconductor Hybrid
Y. Tomita, H. Tamura, M. Kibune, J. Ogawa, K. Gotoh, and T. Kuroda,
IEEE International Solid-State Circuits Conference (ISSCC'06), Dig. Tech. Papers 518-519 2006.02
Research paper (scientific journal), Joint Work
-
A 195-Gb/s 1.2-W Inductive Inter-Chip Wireless Superconnect for 3-D-Stacked System in a Package
N. Miura, D. Mizoguchi, M. Inoue, T. Sakurai, and T .Kuroda,
IEEE Journal of Solid-State Circuits (JSSC), Vol.41, No.1 41 ( 1 ) 23-34 2006.01
Research paper (scientific journal), Joint Work
-
研究成果が社会に浸透する姿を目の当たりにできる最先端技術の世界
KURODA TADAHIRO
河合塾、栄冠めざしてSPECIAL特集号 81 2006
Research paper (scientific journal), Joint Work
-
2005 Symposium on VLSI Circuits Report
KURODA TADAHIRO
Electronic Journal 78-79 2005.10
Research paper (scientific journal), Single Work
-
Power Reduction in High-Speed Inter-Chip Data Communications
KURODA TADAHIRO
IEEE 6th International Conference on ASIC (ASICON 2005) 3-7 2005.10
Research paper (scientific journal), Single Work
-
2005 VLSI サーキットシンポジウム報告
KURODA TADAHIRO
工業調査会『電子材料』 74-75 2005.09
Research paper (scientific journal), Single Work
-
Measurement of Inductive Coupling in Wireless Superconnect
D. Mizoguchi, N. Miura, Y. Yoshida, N. Yamagishi, and T. Kuroda,
International Conference on Solid State Devices and Materials (SSDM'05) 670-671 2005.09
Research paper (scientific journal), Joint Work
-
System LSI: Challenges and Opportunities
KURODA TADAHIRO
COE 4th Hiroshima Intenational Workshop 11-21 2005.09
Research paper (scientific journal), Single Work
-
2005 VLSI 回路シンポジウム報告
KURODA TADAHIRO
「応用物理」第74巻第9号(2005年9月号)ぶらっくぼーど欄 74 ( 9 ) 1249 2005.09
Research paper (scientific journal), Single Work
-
A 40-Gb/s CMOS Clocked Comparator With Bandwidth Modulation Technique
Y. Okaniwa, H. Tamura, M. Kibune, D. Yamazaki, T. S. Cheung, J. Ogawa, N. Tzartzanis, W. W. Walker, and T. Kuroda,
IEEE Journal of Solid-State Circuits (JSSC), Vol.40, No.8 40 ( 8 ) 1680-1687 2005.08
Research paper (scientific journal), Joint Work
-
2005 Symposium on VLSI Circuits Report
KURODA TADAHIRO
Electronic Journal 62-63 2005.07
Research paper (scientific journal), Single Work
-
A CMOS Inpulse Radio Ultra-Wideband Transceiver for 1Mb/s Data Communications And ±2.5cm Range Findings
T. Terada, S. Yoshizumi, Y. Sanada, and T. Kuroda,
Symposium on VLSI Circuits, Dig. Tech. Papers 30-33 2005.06
Research paper (scientific journal), Joint Work
-
Design of Transceiver Circuits for NRZ Signaling in Inductive Inter-chip Wireless Superconnect
D. Mizoguchi, N. Miura, M. Inoue and T. Kuroda,
2005 International Conference on Integrated Circuit Design and Technology (ICICDT) 59-62 2005.05
Research paper (scientific journal), Joint Work
-
195Gb/s 1.2W 電力制御機能付き3次元積層型誘導結合無線超配線
三浦典之, 溝口大介, 井上眞梨, 桜井貴康, 黒田忠広,
電子情報通信学会技報 Vol.105, No.96, ICD2005-28〜39 105 ( 96 ) 45-50 2005.05
Research paper (scientific journal), Joint Work
-
Analysis and Design of Inductive Coupling and Transceiver Circuit for Inductive Inter-Chip Wireless Superconnect
N. Miura, D. Mizoguchi, T. Sakurai and T. Kuroda,
IEEE Journal of Solid-State Circuits (JSSC), Vol.40, No.4 40 ( 4 ) 829-837 2005.04
Research paper (scientific journal), Joint Work
-
A 10-Gb/s Receiver with Series Equalizer and On-chip ISI Monitor in 0.11-um CMOS
Y. Tomita, M. Kibune, J. Ogawa, W. Walker, H. Tamura, and T. Kuroda,
IEEE Journal of Solid-State Circuits (JSSC), Vol.40, No.40 40 ( 40 ) 986-993 2005.04
Research paper (scientific journal), Joint Work
-
A 195Gb/s 1.2W 3D-Stacked Inductive Inter-Chip Wireless Superconnect with Transmit Power Control Scheme
N. Miura, D. Mizoguchi, M. Inoue, H. Tsuji, T. Sakurai, and T. Kuroda,
IEEE International Solid-State Circuits Conference (ISSCC'05), Dig. Tech. Papers 264-265 2005.02
Research paper (scientific journal), Joint Work
-
CICC 2004 Report
KURODA TADAHIRO
Electronic Journal 118-119 2004.11
Research paper (scientific journal), Single Work
-
Cross Talk Countermeasures in Inductive Inter-Chip Wireless Superconnect
N. Miura, D. Mizoguchi, T. Sakurai and T. Kuroda,
in Proc. IEEE Custom Integrated Circuits Conference (CICC'04) 99-102 2004.10
Research paper (scientific journal), Joint Work
-
Non-Contact Inter-Chip Data Communications Technology for System in a Pakage (invited)
KURODA TADAHIRO
in Proc. IEEE International Conference on Solid-State and Integrated Circuits Technology (ICSICT'04) 1347-1352 2004.10
Research paper (scientific journal), Single Work
-
2004 VLSI サーキットシンポジウム報告
KURODA TADAHIRO
電子材料 (工業調査会) 76-77 2004.09
Research paper (scientific journal), Single Work
-
Novel Initial Acquisition Scheme for IR-UWB Systems in Multipath Channel
J. Furukawa, Y. Sanada, and T. Kuroda,
in Proc. the Seventh International Symposium on Wireless Personal Multimedia Communications 1 45-49 2004.09
Research paper (scientific journal), Joint Work
-
ユビキタス社会に向けた低電力CMOS設計
KURODA TADAHIRO
「応用物理」第73巻第9号(2004年9月号) 73 ( 9 ) 1184-1187 2004.09
Research paper (scientific journal), Single Work
-
2004 Simposium on VLSI Circuits報告
KURODA TADAHIRO
「応用物理」第73巻第9号(2004年9月号)ぶらっくぼーど欄 73 ( 9 ) 2004.09
Research paper (scientific journal), Single Work
-
ユビキタスコンピューティングのための近距離データ通信技術
KURODA TADAHIRO
STARCシンポジウム 91-123 2004.09
Research paper (scientific journal), Single Work
-
A Real-Time Multi Face Detection Technique Using Positive-Negative Lines-of-Face Template
Y. Hori, K. Shimizu, Y. Nakamura and T. Kuroda,
International Conference on Pattern Recognition, Vol.1, No.7 1 ( 7 ) 2004.08
Research paper (scientific journal), Joint Work
-
誘導結合チップ間無線超配線用インダクタおよび送受信回路の解析と設計
三浦典之, 溝口大介, ユスミラズ・ビンティ・ユスフ, 桜井貴康, 黒田忠広,
電子情報通信学会技報 Vol.104, No.248, SDM2004-120〜139 104 ( 248 ) 73-78 2004.08
Research paper (scientific journal), Joint Work
-
2004 Symposium onVLSI Circuitsレポート
KURODA TADAHIRO
Electronic Journal 7月号 74-75 2004.07
Research paper (scientific journal), Single Work
-
Analysis and Design of Transceiver Circuit and Inductor Layout for Inductive Inter-chip Wireless Superconnect
N. Miura, D. Mizoguchi, Y. Yusof, T. Sakurai, and T. Kuroda,
Symposium on VLSI Circuits, Dig. Tech. Papers 246-249 2004.06
Research paper (scientific journal), Joint Work
-
UWB対応の低消費電力LSI設計技術
KURODA TADAHIRO
Electronic Journal 82th Technical Symposium 79-98 2004.06
Research paper (scientific journal), Single Work
-
Low Power CMOS SoC Design (invited)
KURODA TADAHIRO
IT SoC Magazine 37-41 2004.06
Research paper (scientific journal), Single Work
-
A 10Gb/s Receiver with Equalizer and On-chip ISI Monitor in 0.11μm CMOS
Y. Tomita, M. Kibune, J. Ogawa, W. Walker, H. Tamura, and T. Kuroda,
Symposium on VLSI Circuits, Dig. Tech. Papers 202-205 2004.06
Research paper (scientific journal), Joint Work
-
A 0.11μm CMOS Clocked Comparator for High-Speed Serial Communications
Y. Okaniwa, H. Tamura, M. Kibune, D. Yamazaki, T. Cheung, J. Ogawa, N. Tzartzanis, W. Walker, and T. Kuroda,
Symposium on VLSI Circuits, Dig. Tech. Papers 198-201 2004.06
Research paper (scientific journal), Joint Work
-
A 1.2Gb/s/pin Wireless Superconnect Based on Inductive Inter-Chip Signaling
D. Mizoguchi, Y.Yusof, N. Miura, T. Sakurai, and T. Kuroda,
電子情報通信学会技報 Vol.104, No.67, ICD2004-23〜36 104 ( 67 ) 31-36 2004.05
Research paper (scientific journal), Joint Work
-
Transceiver Circuits for Pulse-Based Ultra-WideBand
T. Terada, S. Yoshizumi, Y. Sanada, and T. Kuroda,
in Proc. IEEE International Symposium on Circuits and Systems (ISCAS’04) 4349-4352 2004.05
Research paper (scientific journal), Joint Work
-
多層チップ間の無線データ通信を可能にする新技術を提案
KURODA TADAHIRO
SoC/SiPディべロッパーズ・コンファレンス2004 B4/1-B4/21 2004.05
Research paper (scientific journal), Single Work
-
A 1.2Gb/s/pin Wireless Superconnect based on Inductive Inter-chip Signaling (IIS)
D. Mizoguchi, Y. B. Yusof, N. Miura, T. Sakurai, and T. Kuroda,
IEEE International Solid-State Circuits Conference (ISSCC’04), Dig. Tech. Papers 142-143 2004.02
Research paper (scientific journal), Joint Work
-
Practical methodology of post-layout gate sizing for 15% more power saving
N. Miura, N. Kato and T. Kuroda,
in Proc. ACM Asia and South Pacific Design Automation Conference (ASPDAC'04) 434-437 2004.01
Research paper (scientific journal), Joint Work
-
All Digital Transmitter Scheme and Transceiver Design for Pulse-Based Ultra-Wideband Radio
S. Yoshizumi, T. Terada, J. Furukawa, Y. Sanada, and T. Kuroda,
IEEE Ultra Wideband Systems and Technologies (UWBST’03) 438-442 2003.11
Research paper (scientific journal), Joint Work
-
Low Power CMOS Design in Sub-0.1um LSI Era (invited)
KURODA TADAHIRO
in Proc. The 3rd Japan-Taiwan Microelectronics International Symposium 80-90 2003.10
Research paper (scientific journal), Single Work
-
1.27-Gbps/pin, 3mW/pin Wireless Superconnect (WSC) Interface Scheme
K. Kanda, D. D. Antono, K. Ishida, H. Kawaguchi, T. Kuroda, and T. Sakurai,
IEEE International Solid-State Circuits Conference (ISSCC’03) 186-187 2003.02
Research paper (scientific journal), Joint Work
-
Future mobile phones: a beautiful dream or smoke in LSI technology
KURODA TADAHIRO
IEEE International Solid-State Circuits Conference (ISSCC’03), panel discussion 292-293 2003.02
Research paper (scientific journal), Single Work
-
Will SOI ever become a mainstream technology?, IEEE International Electron Devices Meeting (IEDM’02)
KURODA TADAHIRO
Dig. Tech. Papers, panel discussion 609 2002.12
Research paper (scientific journal), Single Work
-
Optimization and Control of VDD and VTH for low-power, high-speed CMOS design (invited)
KURODA TADAHIRO
IEEE/ACM International Conference on Computer Aided Design (ICCAD’02), Dig. Tech. Papers 28-34 2002.11
Research paper (scientific journal), Single Work
-
ユビキタス時代の低電力高速LSI設計技術(招待講演)
KURODA TADAHIRO
第6回システムLSIワークショップ講演資料集 129-140 2002.11
Research paper (scientific journal), Single Work
-
半導体CMOSの低消費電力化
KURODA TADAHIRO
超伝導ニュース第50号 ( 50 ) 2002.09
Research paper (scientific journal), Single Work
-
Low-Power, High-Speed CMOS VLSI Design (invited)
KURODA TADAHIRO
IEEE International Conference on Computer Design (ICCD’02), Dig. Tech. Papers 310-315 2002.09
Research paper (scientific journal), Single Work
-
UWB (Ultra-Wideband) - Great transformation in centennial anniversary of wireless communications -
KURODA TADAHIRO
CIAJ Journal 18-22 2002.07
Research paper (scientific journal), Single Work
-
CICC 2002 Report
KURODA TADAHIRO
Electronic Journal 74-75 2002.06
Research paper (scientific journal), Single Work
-
Mooreの法則の限界 PCではない新しい目標から
KURODA TADAHIRO
Electronic Journal 39 2002.04
Research paper (scientific journal), Single Work
-
Low-power CMOS design for ubiquitous computing (invited)
KURODA TADAHIRO
2001 SEMI ULSI Technology 2-3~2-5 2001.12
Research paper (scientific journal), Single Work
-
CMOS design challenges to power wall (plenary)
KURODA TADAHIRO
International Microprocesses and Nanotechnology Conference, Dig. Tech. Papers 6-7 2001.10
Research paper (scientific journal), Single Work
-
Low power technologies for high performance systems (invited)
KURODA TADAHIRO
International Conference on Solid State Devices and Materials (SSDM’01), Dig. Tech. Papers 2001.09
Research paper (scientific journal), Single Work
-
総論-システムLSIの可能性と課題-
KURODA TADAHIRO
電子情報通信学会誌 Vol.84 No.8 JST Forum, 2001/07 84 ( 8 ) 552-558 2001.08
Research paper (scientific journal), Single Work
-
Low power CMOS design challenges
KURODA TADAHIRO
IEICE Trans. Electronics, vol. E84-C, no. 8 E84-C ( 8 ) 1021-1028 2001.08
Research paper (scientific journal), Single Work
-
Low-power CMOS circuit design (invited)
KURODA TADAHIRO
2001 SEMI ULSI Technology Seminar, Dig. Tech. Papers 1-23~29 2001.08
Research paper (scientific journal), Single Work
-
2001 CICC Report
KURODA TADAHIRO
Electronic Journal 86-87 2001.07
Research paper (scientific journal), Single Work
-
2001 Symposium on VLSI Circuits Report
KURODA TADAHIRO
Electronic Journal 86-87 2001.07
Research paper (scientific journal), Single Work
-
Utilizing surplus timing for power reduction
M. Hamada, Y. Ootaguro, and T. Kuroda,
in Proc. IEEE Custom Integrated Circuits Conference (CICC’01) 89-92 2001.05
Research paper (scientific journal), Joint Work
-
A bit-line leakage compensation scheme for low-voltage SRAM’s
K. Agawa, H. Hara, T. Takayanagi, and T. Kuroda,
IEEE Journal of Solid-State Circuits, vol. 36, no. 5 36 ( 5 ) 2001.05
Research paper (scientific journal), Joint Work
-
低消費電力・高速VLSI設計
KURODA TADAHIRO
REALIZE理工学院 1-177 2001.01
Research paper (scientific journal), Single Work
-
Low-power CMOS design - A design and system perspective - (invited)
KURODA TADAHIRO
2001 SEMI ULSI Technology Symposium, Dig. Tech. Papers 8-6~12 2000.12
Research paper (scientific journal), Single Work
-
Throughput enhancement strategy of maskless electron beam direct writing for logic device
R. Inanami, S. Magoshi, S. Kousai, M. Hamada, T. Takayanagi, K. Sugihara, K. Okumura, and T. Kuroda
IEEE International Electron Devices Meeting (IEDM 2000) Dig. Tech. Papers, 36.2, Dec. 2000 2000.12
Joint Work
-
Low-power CMOS circuit design
T. Kuroda
2000 SEMI Technology Symposium Dig. Tech. Papers 2000.12
Research paper (scientific journal), Single Work
-
A 60-MHz 240-mW MPEG-4 videophone LSI with 16-Mbit embedded DRAM
M. Takahashi, T. Nishikawa, M. Hamada, T. Takayanagi, H. Arakida, N. Machida, H. Yamamoto, T. Fujiyoshi, Y. Ohashi, O. Yamagishi, T. Samata, A. Asano, T. Terazawa, K. Ohmori, Y. Watanabe, H. Nakamura, S. Minami, T. Kuroda, and T. Furuyama,
IEEE Journal of Solid-State Circuits, vol. 35, no. 11 35 ( 11 ) 2000.11
Research paper (scientific journal), Joint Work
-
Variable threshold-voltage CMOS technology
T. Kuroda, T. Fujita, F. Hatori, and T. Sakurai,
IEICE Trans. on Electronics, vol. E83-C, no. 11 E83-C ( 11 ) 2000.11
Research paper (scientific journal), Joint Work
-
IT時代の集積回路の競争軸 低電力、低コスト、そして、短期開発
KURODA TADAHIRO
Electronic Journal 39 2000.10
Research paper (scientific journal), Single Work
-
Optimization and control of VDD and VTH for low-power, high-speed applications(invited)
T. Kuroda
Powerwall 2000 Forum 2000.08
Research paper (scientific journal), Single Work
-
CICC 2000 Report
KURODA TADAHIRO
Electronic Journal 76-77 2000.07
Research paper (scientific journal), Single Work
-
A bit-line leakage compensation scheme for low-voltage SRAM’s
K. Agawa, H. Hara, T. Takayanagi, and T. Kuroda
Symposium on VLSI Circuits Dig. Tech. Papers 70-71 2000.06
Research paper (scientific journal), Joint Work
-
Low-power CMOS digital design with dual embedded adaptive power supplies
T. Kuroda and M. Hamada,
IEEE Journal of Solid-State Circuits, vol. 35, no. 4 35 ( 4 ) 652-655 2000.04
Research paper (scientific journal), Joint Work
-
A 60MHz 240mW MPEG-4 video-phone LSI with 16Mbit embedded DRAM
T. Nishikawa, M. Takahashi, M. Hamada, T. Takayanagi, H. Arakida, N. Machida, H. Yamamoto, T. Fujiyoshi, Yoko Matsumoto, O. Yamagishi, T. Samata, A. Asano, T. Terazawa, K. Ohmori, J. Shirakura, Y. Watanabe, H. Nakamura, S. Minami, T. Kuroda, and T. Furuyama,
IEEE International Solid-State Circuits Conference (ISSCC 2000), Dig. Tech. Papers 230-231 2000.02
Research paper (scientific journal), Joint Work
-
Low power CMOS digital design for multimedia processors (invited)
KURODA TADAHIRO
in Proc. International Conference on VLSI & CAD (ICVC’99) 359-367 1999.10
Research paper (scientific journal), Single Work
-
超低電力消費LSI設計へ向けた技術動向と課題に関して
KURODA TADAHIRO
日本テクノセンター 1-28 1999.10
Research paper (scientific journal), Single Work
-
Variable supply-voltage scheme with 95%-efficiency DC-DC converter for MPEG-4 codec
F. Ichiba, K. Suzuki, S. Mita, T. Kuroda, and T. Furuyama,
in Proc. IEEE International Symposium on Low Power Electronics and Design (ISLPED’99) 54-59 1999.08
Research paper (scientific journal), Joint Work
-
デープサブミクロン時代の半導体集積回路の技術課題とEDAへの期待(招待論文)
KURODA TADAHIRO
情報処理学会論文誌,vol. 40, no. 4 40 ( 4 ) 1500-1506 1999.04
Research paper (scientific journal), Single Work
-
Flip-flop selection technique for power-delay trade-off
M. Hamada, T. Terazawa, T. Higashi, S. Kitabayashi, S. Mita, Y. Watanabe, M. Ashino, H. Hara, and T. Kuroda,
IEEE International Solid-State Circuits Conference (ISSCC’99), Dig. Tech. Papers 270-271 1999.02
Research paper (scientific journal), Joint Work
-
A 60mW MPEG4 video codec using clustered voltage scaling with variable supply-voltage scheme
M. Takahashi, M. Hamada, T. Nishikawa, H. Arakida, T. Fujita, F. Hatori, S. Mita, K. Suzuki, A. Chiba, T. Terasawa, F. Sano, Y. Watanabe, K. Usami, M. Igarashi, T. Ishikawa, M. Kanazawa, T. Kuroda, and T. Furuyama,
IEEE Journal of Solid-State Circuits, vol. 33, no. 11 33 ( 11 ) 1772-1780 1998.11
Research paper (scientific journal), Joint Work
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Low Power CMOS LSI Design Techniques
KURODA TADAHIRO
日本テクノセンター 1-32 1998.10
Research paper (scientific journal), Single Work
-
Low Power CMOS LSI Design Techniques
KURODA TADAHIRO
ISS Seminar 1-53 1998.09
Research paper (scientific journal), Single Work
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Design methodology of ultra low-power MPEG4 codec core exploiting voltage scaling techniques
K. Usami, M. Igarashi, T. Ishikawa, M. Kanazawa, M. Takahashi, M. Hamada, H. Arakida, T. Terazawa, and T. Kuroda,
in Proc. ACM Design Automation Conference (DAC’98) 483-488 1998.06
Research paper (scientific journal), Joint Work
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A top-down low power design technique using clustered voltage scaling with variable supply-voltage scheme
M. Hamada, M. Takahashi, H. Arakida, A. Chiba, T. Terazawa, T. Ishikawa, M. Kanazawa, M. Igarashi, K. Usami, and T. Kuroda,
in Proc. IEEE Custom Integrated Circuits Conference (CICC’98) 495-498 1998.05
Research paper (scientific journal), Joint Work
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Variable supply-voltage scheme for low-power high-speed CMOS digital design
T. Kuroda, K. Suzuki, S. Mita, T. Fujita, F. Yamane, F. Sano, A. Chiba, Y. Watanabe, K. Matsuda, T. Maeda, T. Sakurai, and T. Furuyama,
IEEE Journal of Solid-State Circuits, vol. 33, no. 3, 454-462 1998.03
Research paper (scientific journal), Joint Work
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A 60mW MPEG4 video codec using clustered voltage scaling with variable supply-voltage scheme
M. Takahashi, M. Hamada, T. Nishikawa, H. Arakida, Y. Tsuboi, T. Fujita, F. Hatori, S. Mita, K. Suzuki, A. Chiba, T. Terasawa, F. Sano, Y. Watanabe, H. Momose, K. Usami, M. Igarashi, T. Ishikawa, M. Kanazawa, and T. Kuroda,
IEEE International Solid-State Circuits Conference (ISSCC’98), Dig. Tech. Papers 36-37 1998.02
Research paper (scientific journal), Joint Work
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低電力CMOS LSI技術
桜井貴康, 黒田忠広,
ISS産業科学システムズ 1-33 1998.01
Research paper (scientific journal), Joint Work
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LSIの低消費電力化技術と最新動向
桜井貴康, 黒田忠広,
日本テクノセンター 1-39 1997.12
Research paper (scientific journal), Joint Work
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低電力LSIの回路技術
KURODA TADAHIRO
日本工業技術センター 38-60 1997.09
Research paper (scientific journal), Single Work
-
Low-power design and multimedia ULSI’s (invited)
T. Sakurai and T. Kuroda,
XXVth General Assembly of the International Union of Radio Science (URSI) 168 1997.08
Research paper (scientific journal), Joint Work
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Low-power CMOS design through VTH control and low-swing circuits (invited)
T. Sakurai, H. Kawaguchi, and T. Kuroda,
in Proc. of IEEE International Symposium on Low Power Electronics and Design (ISLPED’97) 1-6 1997.08
Research paper (scientific journal), Joint Work
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マルチメディアCMOS VLSIのための低電力回路設計技術(招待論文)
黒田忠広, 桜井貴康,
電子情報通信学会論文誌A, vol. J80-A, no. 5 J80-A ( 5 ) 746-752 1997.05
Research paper (scientific journal), Joint Work
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A 300MIPS/W RISC core processor with variable supply-voltage scheme in variable threshold-voltage CMOS
K. Suzuki, S. Mita, T. Fujita, F. Yamane, F. Sano, and T. Sakurai, A. Chiba, Y. Watanabe, K. Matsuda, T. Maeda, and T. Kuroda,
in Proc. IEEE Custom Integrated Circuits Conference (CICC’97) 587-590 1997.05
Research paper (scientific journal), Joint Work
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しきい値電圧可変技術とその応用
KURODA TADAHIRO
日本工業技術センター 42-69 1997.01
Research paper (scientific journal), Single Work
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Variable threshold-voltage CMOS (VTCMOS) technology (invited)
KURODA TADAHIRO
Asia and South Pacific Design Automation Conference (ASPDAC’97) 117-141 1997.01
Research paper (scientific journal), Single Work
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LSIの低消費電力化・高速化技術
桜井貴康, 黒田忠広,
日本テクノセンター 1-44 1996.12
Research paper (scientific journal), Joint Work
-
Tutorial on Low-Power Design Methodology (invited)
T. Sakurai and T. Kuroda,
in Proc. the Synthesis and System Integration of Mixed Technologies (SASIMI) 3-10 1996.11
Research paper (scientific journal), Joint Work
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A 0.9V 150MHz 10mW 4mm2 2-D discrete cosine transform core processor with variable-threshold-voltage scheme
T. Kuroda, T. Fujita, S. Mita, T. Nagamatu, S. Yoshioka, K. Suzuki, F. Sano, M. Norishima, M. Murota, M. Kako, M. Kinugawa, M. Kakumu, and T. Sakurai,
IEEE Journal of Solid-State Circuits, vol. 31, no. 11 31 ( 11 ) 1770-1779 1996.11
Research paper (scientific journal), Joint Work
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Low-power circuit design for multimedia CMOS VLSI’s
T. Sakurai and T. Kuroda,
in Proc. Synthesis and System Integration of Mixed Technologies (SASIMI’96) 3-10 1996.11
Research paper (scientific journal), Joint Work
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しきい値可変技術(VTCMOS)の回路技術と応用設計
KURODA TADAHIRO
日本工業技術センター 24-44 1996.08
Research paper (scientific journal), Single Work
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Threshold-voltage control schemes through substrate-bias for low-power high-speed CMOS LSI designs (invited)
T. Kuroda and T. Sakurai,
Journal of VLSI Signal Processing Systems, vol. 13, no. 2/3 13 ( 2/3 ) 191-201 1996.08
Research paper (scientific journal), Joint Work
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Substrate noise influence on circuit performance in variable threshold-voltage scheme
T. Kuroda, T. Fujita, S. Mita, T. Mori, K. Matsuo, M. Kakumu, and T. Sakurai,
in Proc. IEEE International Symposium on Low Power Electronics and Design (ISLPED’96) 309-312 1996.08
Research paper (scientific journal), Joint Work
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Achieving Low-Power Through Control of Threshold Voltage (invited)
T. Sakurai and T. Kuroda,
XXXVth General Assembly of the International Union of Radio Science (URSI) Abstracts 168 1996.08
Research paper (scientific journal), Joint Work
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低消費電力/高速CMOS回路設計手法
KURODA TADAHIRO
日本工業技術センター 1-23 1996.08
Research paper (scientific journal), Single Work
-
マルチメディアLSIと低消費電力設計技術(招待)
桜井貴康, 黒田忠広,
電気学会 第43回半導体専門講座 1-32 1996.07
Research paper (scientific journal), Joint Work
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A 0.9V 150MHz 10mW 4mm2 2-D discrete cosine transform core processor with variable-threshold-voltage (VT) scheme
K. Suzuki, T. Kuroda, T. Fujita, S. Mita, T. Nagamatsu, S. Yoshioka, F. Sano, M. Norishima, M. Murota, M. Kako, M. Kinugawa, M. Kakumu, and T. Sakurai,
in Proc. 4th International Workshop on Advanced LSI’s 150-158 1996.07
Research paper (scientific journal), Joint Work
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Transform Core Professor with Variable-Threshold-Voltage (VT) Scheme
KURODA TADAHIRO
電子情報通信学会 集積回路研究会 信学技法, ED96-49/SDM96-32/ICD96-52 43-48 1996.06
Research paper (scientific journal), Single Work
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Capacitor-free level-sensitive active pull-down ECL circuit with self-adjusting driving capability
T. Kuroda, T. Fujita, M. Noda, Y. Itabashi, S. Kabumoto, T. S. Wong, D. Beeson, and D. Gray,
IEEE Journal of Solid-State Circuits, vol. 31, no. 6 31 ( 6 ) 819-827 1996.06
Research paper (scientific journal), Joint Work
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A 5Gb/s ATM Switch Element CMOS LSI Supporting 5 Quality-of-Service Classes with 200MHz LVDS Interface
K. Seki, Y. Unekawa, K. Sakue, T. Nakano, S. Yoshida, T. Nagamatsu, H. Nakakita, Y. Kaneko, M. Motoyama, Y. Ohba, K. Ise, M. Ono, K. Fujikawara, Y. Miyazawa, T. Kuroda, Y. Kamatani, T. Sakurai, and A. Kanuma,
Technical Report of IEICE, ED96-51 57-64 1996.06
Research paper (scientific journal), Joint Work
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A 0.9V 150MHz 10mW 4mm2 2-D Discrete Cosine Transform Core Professor with Variable-Threshold-Voltage(VT) Scheme
藤田哲也, 黒田忠広, 三田真二, 永松 徹, 吉岡晋一, 佐野文彦, 法島政之, 室田雅之, 加古真琴, 衣川正明, 各務正一, 桜井貴康,
電子情報通信学会 集積回路研究会 信学技法, ED96-49/SDM96-32/ICD96-52 43-48 1996.06
Research paper (scientific journal), Joint Work
-
低消費電力化設計手法
KURODA TADAHIRO
日本工業技術センター 1-29 1996.05
Research paper (scientific journal), Single Work
-
A high-speed low-power 0.3um CMOS gate array with variable threshold voltage (VT) scheme
T. Kuroda, T. Fujita, T. Nagamatu, S. Yoshioka, T. Sei, K. Matsuo, Y. Hamura, T. Mori, M. Murota, M. Kakumu, and T. Sakurai,
in Proc. IEEE Custom Integrated Circuits Conference (CICC’96) 53-56 1996.05
Research paper (scientific journal), Joint Work
-
A 0.9V 150MHz 10mW 4mm2 2-D discrete cosine transform core processor with variable-threshold-voltage scheme
T. Kuroda, T. Fujita, S. Mita, T. Nagamatu, S. Yoshioka, F. Sano, M. Norishima, M. Murota, M. Kako, M. Kinugawa, M. Kakumu, and T. Sakurai,
IEEE International Solid-State Circuits Conference (ISSCC’96), Dig. Tech. Papers 166-167 1996.02
Research paper (scientific journal), Joint Work
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A 5Gb/s 8 x 8 ATM switch element CMOS LSI supporting five quality-of-service classes with 200MHz LVDS interface
Y.Unekawa, K.Fukuda, K.Sakaue, T.Nakao, S.Yoshioka, T.Nagamatsu, H.Nakakita, Y.Kaneko, M.Motoyama, Y.Ohba, K.Ise, M.Ono, K.Fujiwara, Y.Miyazawa, T.Kuroda, Y.Kamitani, T.Sakurai, and A.Kanuma,
IEEE International Solid-State Circuits Conference (ISSCC’96), Dig. Tech. Papers 118-119 1996.02
Research paper (scientific journal), Joint Work
-
低消費電力設計手法
KURODA TADAHIRO
日本工業技術センター 35-53 1995.11
Research paper (scientific journal), Single Work
-
Low-power circuit design for multimedia VLSI (invited)
T. Sakurai and T. Kuroda,
in Proc. International Conference on VLSI & CAD (ICVC’95) 1-6 1995.10
Research paper (scientific journal), Joint Work
-
Tutorial on Low-Power LSI Design (invited)
T. Sakurai and T. Kuroda,
The 8th Karuizawa Workshop on Circuits and Systems 209-214 1995.04
Research paper (scientific journal), Joint Work
-
Overview of low-power ULSI circuit techniques
T. Kuroda and T. Sakurai,
IEICE Transactions. on Electronics, vol. E78-C, no. 4, E78-C ( 4 ) 334-344 1995.04
Research paper (scientific journal), Joint Work
-
Low-Power Circuit Design using Pass-Transistor Logic and Substrate-bias Control (invited)
T. Kuroda and T. Sakurai,
The 8th Karuizawa Workshop on Circuits and Systems 215-220 1995.04
Research paper (scientific journal), Joint Work
-
1.65Bb/s 60mW 4:1 multiplexer and 1.8Gb/s 80mW 1:4 demultiplexer ICs using 2V 3-level series gating ECL circuits
T. Kuroda, T. Fujita, Y. Itabashi, S. Kabumoto, M. Noda, and A. Kanuma,
IEEE International Solid-State Circuits Conference (ISSCC’95), Dig. Tech. Papers 36-37 1995.02
Research paper (scientific journal), Joint Work
-
50% Active Power Saving without Speed Degradation Using Standby Power Reduction (SPR) Circuit
K. Seta, H. Hara, T. Kuroda, M. Kakumu, and T. Sakurai,
IEEE International Solid-State Circuits Conference (ISSCC’95), Dig. Tech. Papers 318-319 1995.02
Research paper (scientific journal), Joint Work
-
ランダムロジック-パストランジスタロジック-
KURODA TADAHIRO
日本工業技術センター 25-38 1994.11
Research paper (scientific journal), Single Work
-
ローパワーLSI設計技術の現状と動向
KURODA TADAHIRO
日本工業技術センター 1-24 1994.11
Research paper (scientific journal), Single Work
-
Analysis and optimization of BiCMOS gate circuits
T. Kuroda, Y. Sakata, and K. Matsuo,
IEEE Journal of Solid-State Circuits, vol. 29, no. 5 29 ( 5 ) 564-571 1994.05
Research paper (scientific journal), Joint Work
-
Capacitor-free level-sensitive active pull-down ECL circuit with self-adjusting driving capability
T. Kuroda, T. Fujita, M. Noda, P. Thai, L. Yang, and D. Gray,
Symposium on VLSI Circuits, Dig. Tech. Papers 29-30 1993.06
Research paper (scientific journal), Joint Work
-
A 51k-gate low power ECL gate array family with metal-compiled and embedded SRAM
D. Gray, D. Beeson, B. Davis, D. Hutchings, P. Thai, T. S. Wong, T. Kuroda, M. Nakamura, and M. Noda,
in Proc. IEEE Custom Integrated Circuits Conference (CICC’93) 23.4.1-23.4.4 1993.05
Research paper (scientific journal), Joint Work
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Automated Bias Control (ABC) circuit for high-performance VLSI's
T. Kuroda, T. Fukunaga, K. Matsuo, K. Kasai, A. Hirata, S. Fujii, M. Kimura, and H. Suzuki,
IEEE Journal of Solid-State Circuits, vol. 27, no. 4 27 ( 4 ) 641-648 1992.04
Research paper (scientific journal), Joint Work
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0.5um BiCMOS standard-cell macros including 0.5W 3ns register file and 0.6W 5ns 32kB cache
Hiroyuki Hara, Takayasu Sakurai, Tetsu Nagamatsu, Shin'ichi Kobayashi, Katsuhiro Seta, Hiroshi Momose, Yoichirou Niitsu, Hiroyuki Miyakawa, Tadahiro Kuroda, Kouji Matsuda, Yoshinori Watanabe, Fumihik,
IEEE International Solid-State Circuits Conference (ISSCC’92), Dig. Tech. Papers 46-47 1992.02
Research paper (scientific journal), Joint Work
-
Automated Bias Control (ABC) circuit for high-performance VLSIs
T. Kuroda, T. Fukunaga, K. Matsuo, K. Kasai, A. Hirata, S. Fujii, M. Kimura, and H. Suzuki,
Symposium on VLSI Circuits, Dig. Tech. Papers 15-16 1991.06
Research paper (scientific journal), Joint Work
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Analysis and optimization of BiCMOS gate circuits
T. Kuroda, Y. Sakata, and K. Matsuo,
in Proc. IEEE International Symposium on Circuits and Systems (ISCAS’91) 2112-2115 1991.06
Research paper (scientific journal), Joint Work
-
Unified design methodology and device architecture for multi-generation ASIC applications
T. Kuroda, H. Suzuki, H. Akiba, T. Aoki, T. Shigematsu, and K. Kawagai,
in Proc. IEEE Custom Integrated Circuits Conference (CICC’88) 25.7.1-25.7.4 1988.05
Research paper (scientific journal), Joint Work
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A high performance scalable standard cell library with true second sourcing
G. Buurma, P. Michel, and T. Kuroda,
Proc. IEEE Custom Integrated Circuits Conference (CICC’87) 241-244 1987.05
Research paper (scientific journal), Joint Work
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P-well/N-well compatible CMOS processing for ASIC applications
T. Kuroda, H. Akiba, H. Suzuki, and T. Aoki,
International Conference on Solid State Devices and Materials (SSDM’86), Dig. Tech. Papers 57-60 1986.08
Research paper (scientific journal), Joint Work