Matsuya, Takeshi

写真a

Affiliation

Graduate School of Media and Governance （Shonan Fujisawa）

Position

Project Senior Assistant Professor (Non-tenured)/Project Assistant Professor (Non-tenured)/Project Lecturer (Non-tenured)

External Links
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Academic Background 【 Display / hide 】

  • 2002.09
    -
    2006.09

    Keio University, Faculty of Environmental Information

    University, Graduated

  • 2006.09
    -
    2008.09

    Keio University, Graduate School of Media and Governance

    Graduate School, Completed, Master's course

  • 2008.09
    -
    2016.09

    Keio University, Graduate School of Media and Governance

    Graduate School, Completed, Doctoral course

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Academic Degrees 【 Display / hide 】

  • Ph.D., Keio University, Coursework, 2016.09

    Low-latency distributed architecture using IP (Internet Protocol)

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Papers 【 Display / hide 】

  • NetTLP: A development platform for PCIe devices in software interacting with hardware

    Kuga Y., Nakamura R., Matsuya T., Sekiya Y.

    Proceedings of the 17th USENIX Symposium on Networked Systems Design and Implementation, NSDI 2020 （Proceedings of the 17th USENIX Symposium on Networked Systems Design and Implementation, NSDI 2020)     141 - 155 2020

    ISSN  9781939133137

    　View Summary

    Observability on data communication is always essential for prototyping, developing, and optimizing communication systems. However, it is still challenging to observe transactions flowing inside PCI Express (PCIe) links despite them being a key component for emerging peripherals such as smart NICs, NVMe, and accelerators. To offer the practical observability on PCIe and for productively prototyping PCIe devices, we propose NetTLP, a development platform for software PCIe devices that can interact with hardware root complexes. On the NetTLP platform, software PCIe devices on top of IP network stacks can send and receive Transaction Layer Packets (TLPs) to and from hardware root complexes or other devices through Ethernet links, an Ethernet and PCIe bridge called a NetTLP adapter, and PCIe links. This paper describes the NetTLP platform and its implementation: the NetTLP adapter and LibTLP, which is a software implementation of the PCIe transaction layer. Moreover, this paper demonstrates the usefulness of NetTLP through three use cases: (1) observing TLPs sent from four commercial PCIe devices, (2) 400 LoC software Ethernet NIC implementation that performs an actual NIC for a hardware root complex, and (3) physical memory introspection.

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Papers, etc., Registered in KOARA 【 Display / hide 】

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