Nakano, Nobuhiko

写真a

Affiliation

Faculty of Science and Technology, Department of Electronics and Electrical Engineering (Yagami)

Position

Professor
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Career 【 Display / hide 】

  • 1995.04
    -
    1996.03

    慶應義塾大学理工学部 ,訪問研究員

  • 1995.04
    -
    1996.03

    日本学術振興会 ,特別研究員

  • 1996
    -
    1999

    1年生クラス担任

  • 1996.04
    -
    1999.03

    慶應義塾大学理工学部電子工学科 ,助手

  • 1999.04
    -
    2003.03

    慶應義塾大学理工学部電子工学科 ,専任講師

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Academic Background 【 Display / hide 】

  • 1990.03

    Keio University, Faculty of Science and Engineering, 電気工学科

    University, Graduated

  • 1992.03

    Keio University, Graduate School, Division of Science and Engineeri, 電気工学専攻

    Graduate School, Completed, Master's course

  • 1995.03

    Keio University, Graduate School, Division of Science and Engineeri, 電気工学専攻

    Graduate School, Completed, Doctoral course

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Academic Degrees 【 Display / hide 】

  • 工学, Keio University, 1995.03

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Research Areas 【 Display / hide 】

  • Manufacturing Technology (Mechanical Engineering, Electrical and Electronic Engineering, Chemical Engineering) / Electron device and electronic equipment (Electronic Device/Electronic Equipment)

  • Life Science / Neuroscience-general (General Neuroscience)

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Research Keywords 【 Display / hide 】

  • アナログ回路設計

  • noise modeling

  • bio-sensing

  • numerical simulation

  • LSI

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Papers 【 Display / hide 】

  • Silicon-Germanium Ultrashort-Gate Transistor Performances by Electrical-Thermal Simulations

    Yamakiri S., Sugiura T., Yamamura K., Watanabe Y., Nakano N.

    IEEE Transactions on Nanotechnology 23   361 - 367 2024

    ISSN  1536125X

    　View Summary

    As a replacement for conventional silicon (Si), the germanium (Ge) materials have attracted interest because Ge provides larger carrier mobility and is advantageous for high-speed switching. In this study, the silicon-germanium (SiGe) ultrashort-gate transistor performances were studied using electrical-Thermal analysis. The material properties of SiGe can be modified by regulating the mole fraction in Si1-xGe1-x, and the different material characteristics affect the nanoscale transistor performance because channel regulation strongly depends on the bandgap energy. This study aims to reveal the structural and material designs of SiGe transistors to ensure sufficient performance and reliability.

  • Photovoltaic-Generated Millivolt Reference Using Multiple Integrated Photovoltaic Cells

    Sugiura T., Watanabe Y., Nakano N.

    IEEE Electron Device Letters 45 ( 7 ) 1117 - 1120 2024

    ISSN  07413106

    　View Summary

    This study presents a novel voltage reference topology designed based on a self-generated millivolt reference obtained from multiple on-chip integrated photovoltaic cells. The difference in the open-circuit voltage (VOC ) between two photovoltaic cells (Δ VOC ) is used as the voltage reference. A heavily-doped region is formed at the silicon/contact interface, which functions as the electrical passivation that changes the order of the surface recombination velocity from 106 - 107 cm/s to 102 cm/s. Therefore, we employ one electrically passivated cell and one un-passivated cell in the proposed voltage reference topology. The illuminance-independent Δ VOC, which is temperature dependent, is generated by using the two cells. Therefore, including an additional VOC with the coefficient (α VOC ) successfully eliminates the temperature-dependency and satisfies the voltage-reference demands. We performed a numerical simulation analysis, which demonstrates that an area of <0.001 mm2 is available in the two cells topology, and a total area of 0.0014 mm2 is required to eliminate the temperature variations in the three cells topology.

  • Mechanical Stress Effects on 4H-Silicon Carbide Power Diodes

    Sugiura T., Yamashita K., Nakano N.

    IEEE Open Journal of Power Electronics 5   683 - 691 2024

    　View Summary

    This study discusses the effect of stress on 4H-silicon carbide (4H-SiC) power diodes using numerical simulations. Two power diodes were evaluated; namely, a 600 V PiN diode and 1.8 kV junction barrier Schottky (JBS) diode. Stress changes the carrier mobilities in the material of the PiN diode of a bipolar diode; that is, the mobility is enhanced by the piezoresistive effect, which minimizes the on-resistance or leakage current. The simulation results demonstrate that compressive stress can have a positive effect on the device operation, particularly in p+-substrate power diodes. Regarding the JBS diode, the GPa-order tensile stress positively effects both forward and reverse characteristics. A cantilever structure is suitable for JBS diodes, and press-pack packaging for PiN diodes can enhance the device characteristics.

  • Bulk Carrier Contaminations and Their Effects on MOSFETs Under Energy Harvesting Systems

    Watanabe Y., Sugiura T., Nakano N.

    IEEE Journal of the Electron Devices Society 12   450 - 456 2024

    　View Summary

    Energy harvesters, such as photovoltaic cells, generate carriers in the deep substrate regions; these carriers can affect MOSFETs and deteriorate their performance or even cause malfunctioning. In this study, we discussed the effects of bulk carrier contamination on integrated MOSFETs in the context of energy-harvesting devices. We confirmed that the close integration of MOSFET circuits in a photovoltaic cell causes malfunctioning under strong light illumination. Moreover, numerical simulations revealed that PMOS is highly sensitive to carrier contamination as a forward pn-junction from the bulk-side storage carriers into the NWell region. Furthermore, increasing the distance from the illumination window was not an effective countermeasure, and alternative methods, such as the silicon-on-insulator substrate, n - substrate, or NMOS logic, should be implemented for such large-scale integration.

  • On-Chip Fully Integrated Thermoelectric Devices Designed on Standard CMOS Process

    Sugiura T., Watanabe Y., Yamamura K., Yamakiri S., Nakano N.

    IEEE Transactions on Electron Devices (IEEE Transactions on Electron Devices)  70 ( 12 ) 6534 - 6539 2023.12

    ISSN  00189383

    　View Summary

    We propose fully integrated ON-chip thermoelectric (TE) devices comprising sensors and energy harvesters, and designed using a 0.18-μm standard complementary metal.oxide.semiconductor (CMOS) process. A temperature sensor and thermal energy harvester were designed using a standard CMOS process without any additional micro-electromechanical system or postprocessing. Numerical simulations revealed different optimal unit-cell lengths for the energy harvester and sensor; for utilizing the maximum power PMax and open-circuit voltage (VOC), a harvester and sensor require short and long unit cells, respectively. The thermal energy harvester, with a size of 140 × 140 μm, generated nanowatt-order power, and the temperature sensor, with a size of 100 × 150 μm, generated millivolt-order (VOC). The numerical analysis predicts a 2.5 mV (VOC) as the temperature sensor and 0.8 nW power generation by the TE energy harvester at 50. C thermal input under optimized layout flows. Examples of layout flows are useful to investigate how portable Internet of Things devices work under the everywhere to monitor thermal environments.

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Papers, etc., Registered in KOARA 【 Display / hide 】

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Presentations 【 Display / hide 】

  • An On-Chip Ultra-Low-Power Hz-Range Ring Oscillator Based on Dynamic Leakage Suppression Logic

    Jorge Cañada, Yui Yoshida, Hiroki Miura, Nobuhiko Nakano

    International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2020), 

    2020.07

  • Low-power High-Voltage Driver Based on Standard CMOS Technology for On-Chip Memory Recording

    Jorge Cañada, Yui Yoshida, Takashi Tonomura, Hiroki Miura, Nobihiko Nakano

    電子回路研究会 (日本大学理工学部駿河台校舎タワー・スコラ) , 

    2019.12
    , 

    Oral presentation (general), 電気学会

  • リングオシレータ用昇圧器付きクロスカップルチャージポンプ

    三浦 大毅, 吉田 祐威, 外村 崇史, Jorge Canada, 中野 誠彦

    電子回路研究会, 

    2019.12
    , 

    Oral presentation (general)

  • A delta-sigma modulator with frequency division multiplexing for multi-channel EEG acquisition front-end

    Mikawa M., Kawazoe S., Fukuoka R., Nakano N. 

    2019 26th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2019, 

    2019.11
    , 

    Poster presentation

  • Frequency Adjustable On-Chip Notch Filter to Eliminate Hum Noise for EEG Acquisition

    Ryuto Fukuoka, Syohei Kawazoe,Mikiyoshi Mikawa, and Nobuhiko Nakano

    2019 International Conference on Analog VLSI Circuits (Yilan, Taiwan) , 

    2019.10
    , 

    Oral presentation (general)

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Research Projects of Competitive Funds, etc. 【 Display / hide 】

  • 人工シナプス用多チャンネル膜電位固定LSIの実現

    2014
    -
    2017.03

    日本学術振興会, Grant-in-Aid for Scientific Research, Research grant, Principal investigator

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Awards 【 Display / hide 】

  • Certificate of Appreciation

    2020.06, IEICE Electronics Express Editorial Committee

    Type of Award： Other

  • Taiwan and Japan Conference on Circuits and Systems 2019 Best student paper award

    Jorge Canada, Nobuhiko Nakano, 2019.08, IEEE CASS, An On-Chip Sub-pW Hz-Range Ring Oscillator

    Type of Award： Award from international society, conference, symposium, etc.

  • LSIとシステムのワークショップ優秀ポスター賞

    2017.05, 電子情報通信学会, 標準CMOSプロセスによるオンチップ太陽電池の高性能化

  • エレクトロニクスソサエティ功労賞

    2017.03, 電子情報通信学会

    Type of Award： Award from publisher, newspaper, foundation, etc.

  • 電気学会 論文発表賞

    中野 誠彦, 1992, 電気学会

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Courses Taught 【 Display / hide 】

  • SEMINAR IN ELECTRONICS AND INFORMATION ENGINEERING(2)

    2025

  • SEMINAR IN ELECTRONICS AND INFORMATION ENGINEERING(1)

    2025

  • RECITATION IN ELECTRONICS AND INFORMATION ENGINEERING

    2025

  • NUMERICAL MODELING AND COMPUTATIONAL SIMULATION

    2025

  • LSI CIRCUIT DESIGN 1

    2025

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Courses Previously Taught 【 Display / hide 】

  • 電気電子計測

    Keio University

    2014.04
    -
    2015.03
    , 

    Spring Semester, Lecture, Within own ｆaculty

  • 電気電子工学実験第二

    Keio University

    2014.04
    -
    2015.03
    , 

    Autumn Semester, Laboratory work/practical work/exercise, Lecturer outside of Keio

  • 計算機構成

    Keio University

    2014.04
    -
    2015.03
    , 

    Autumn Semester, Lecture, Within own ｆaculty

  • 理工学基礎実験

    Keio University

    2014.04
    -
    2015.03
    , 

    Spring Semester, Laboratory work/practical work/exercise, Lecturer outside of Keio

  • 数値モデリングと計算機シミュレーション

    Keio University

    2014.04
    -
    2015.03
    , 

    Spring Semester, Lecture, Within own ｆaculty

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Memberships in Academic Societies 【 Display / hide 】

  • 電気学会, 

    1992
    -
    Present

  • 応用物理学会, 

    1992.02
    -
    Present

  • シリコンテクノロジー分科会, 

    2017.04
    -
    Present

  • プラズマエレクトロニクス分科会, 

    1996.03
    -
    2016.05

  • 電子通信情報学会, 

    2009
    -
    Present

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Committee Experiences 【 Display / hide 】

  • 2020.06
    -
    Present

    CAS研究会専門委員, 電子情報通信学会

  • 2020.04
    -
    Present

    電子・情報・システム部門　役員会　委員, 電気学会

  • 2020.04
    -
    Present

    電子・情報・システム部門編修委員会委員, 電気学会

  • 2020.04
    -
    2022.03

    サステナブルコンピューティング特別研究会委員長, 電子情報通信学会

  • 2020.04
    -
    2021.03

    2020年電子・情報・システム部門大会委員会　委員, 電気学会

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