Ishikuro, Hiroki

写真a

Affiliation

Faculty of Science and Technology, Department of Electronics and Electrical Engineering (Yagami)

Position

Professor

Related Websites

External Links

Career 【 Display / hide

  • 1999.04
    -
    2006.03

    (株)東芝 SoC研究開発センター

  • 2006.04
    -
    2008.03

    慶應義塾大学理工学部電子工学科, 専任講師

  • 2008.04
    -
    2014.03

    慶應義塾大学理工学部電子工学科, 准教授

  • 2014.04
    -
    Present

    慶應義塾大学理工学部電子工学科, 教授

Academic Background 【 Display / hide

  • 1994.03

    The University of Tokyo, Faculty of Engineering, 電子工学科

    University, Graduated

  • 1996.03

    The University of Tokyo, Graduate School, Division of Engineering, 電子工学

    Graduate School, Completed, Master's course

  • 1999.03

    The University of Tokyo, Graduate School, Division of Engineering, 電子工学専攻

    Graduate School, Completed, Doctoral course

Academic Degrees 【 Display / hide

  • 工学, The University of Tokyo, Coursework, 1999.03

 

Research Areas 【 Display / hide

  • Electron device/Electronic equipment (LSI circuit design)

Research Themes 【 Display / hide

  • Fundamental technologies for dependable VLSI system, 

    2009
    -
    2014

     View Summary

    JST CRESTプロジェクトにて、高信頼ワイヤレス・ソリッド・ステート・ドライブ(SSD)用の非接触データ・電力伝送回路の研究を行っている

  • Extremely Low-power Circuits and Systems (Green IT Project), 

    2009
    -
    2012

     View Summary

    0.5Vで動作するマイクロワットオーダーの極低電力アナログ回路および無線回路の研究を行っている。

 

Papers 【 Display / hide

  • A Discrete-Time Model for Frequency Modulated Charge Pumps with Synchronized Controller

    Tan Y., Ishikuro H.

    Midwest Symposium on Circuits and Systems (Midwest Symposium on Circuits and Systems)  2020-August   929 - 932 2020.08

    ISSN  9781538629161

     View Summary

    © 2020 IEEE. This paper presents a discrete-time based approach for frequency modulated charge pumps with synchronized controller. In order to handle the varying frequency, this paper first introduced a method to calculate the output voltage of an open-loop charge pump with predefined frequencies, which is improved from a fixed frequency open-loop model verified in previous research. Then a closed-loop model is proposed for synchronized frequency controllers. An algorithm is hence created from the closed-loop model to simulate the output of charge pumps. The simulation result shows a competitive accuracy and much faster speed when comparing it with transistor level simulations. Overall, this paper demonstrated its value in terms of modeling the frequency modulated charge pumps and hence assisted the top-down design flow.

  • A Wide Input-Range, Low-Power and Highly Flexible 18 Bit Time-to-Digital Converter with Compact Differential Circuit Topology

    Toth P., Ishikuro H.

    Midwest Symposium on Circuits and Systems (Midwest Symposium on Circuits and Systems)  2020-August   937 - 940 2020.08

    ISSN  9781538629161

     View Summary

    © 2020 IEEE. This paper presents a wide-dynamic-range high-resolution time-domain converter concept tailored for low-power sensor interfaces. The unique system structure applies different techniques to reduce circuit complexity, power consumption, and noise sensitivity. A multi-cycle concept, which allows a virtual delay line extension, is applied to achieve high resolution down to 1 ns. At the same time, it expands the dynamic range drastically up to 2.35 ms. Moreover, individually tunable delay elements in the range of 1 ns to 12 ns allow on the one hand on-demand flexible operation in a low- or high-resolution mode for smart sensing applications and flexible power control. On the other hand, delay stage mismatch calibration. The concept of this paper is evaluated through both simulation and hardware by a custom-designed PCB using commercially available components. An HDL state machine operates as control logic on a generic FPGA. The presented concept is highly suitable for on-chip integration.

  • A digital-to-resistance converter with an automatic offset calibration method for evaluating dynamic performance of resistive sensor readout circuits

    Nakagawa S., Miyazaki T., Ishikuro H.

    I2MTC 2020 - International Instrumentation and Measurement Technology Conference, Proceedings (I2MTC 2020 - International Instrumentation and Measurement Technology Conference, Proceedings)   2020.05

    ISSN  9781728144603

     View Summary

    © 2020 IEEE. In this paper, a digital-to-resistance converter (DRC) with automatic offset calibration circuits is proposed. This circuit is used to evaluate the dynamic performance of resistive sensor readout circuits. The proposed DRC consists of a digital-to-analog converter, an analog multiplier, a fixed-value reference resistor, and current sources. A wide-range resistance changing at high frequency is achieved with the proposed DRC. In order to minimize the resistance error caused by the offset voltage of op-amps, an automatic offset calibration method is proposed. This developed prototype DRC achieved 96.3 dB dynamic range, 56.1 dB SNDR at 10kHz, and a maximum operating frequency is 100kHz.

  • A linearity testing of cascaded analog mixed-signal blocks using SEIR method

    Ishikawa T., Pai C.W., Ishikuro H.

    I2MTC 2020 - International Instrumentation and Measurement Technology Conference, Proceedings (I2MTC 2020 - International Instrumentation and Measurement Technology Conference, Proceedings)   2020.05

    ISSN  9781728144603

     View Summary

    © 2020 IEEE. This paper proposes a method to separate distortions of the input signal, amplifier, and analog-to-digital converter (ADC), which are cascaded blocks in the testing of an analog front-end system. The proposed technique extends the stimulus error identification and removal (SEIR) method to separate the low-quality input test signal, the nonlinearity of amplifier and ADC. The system model was built by using MATLAB/Simulink, and the nonlinearity of the input signal with distortion, amplifier, and ADC were successfully separated. With a 12-bit ADC, the estimation error of each block is less than 1 LSB in the simulation, and the proposed method was verified by measurement. The relations between the estimation error, calculation cost and each parameter in the proposed method are systematically studied.

  • Low-Power and ppm-Level Multimolecule Detection by Integration of Self-Heated Metal Nanosheet Sensors

    Tanaka T., Yanagida T., Uchida K., Tabuchi K., Tatehora K., Shiiki Y., Nakagawa S., Takahashi T., Shimizu R., Ishikuro H., Kuroda T.

    IEEE Transactions on Electron Devices (IEEE Transactions on Electron Devices)  66 ( 12 ) 5393 - 5398 2019.12

    ISSN  00189383

     View Summary

    © 1963-2012 IEEE. H2 and NH3 detection with low power consumption was demonstrated by integrated chemiresistive Pt and PtRh nanosheet sensors on glass substrates. The self-heating effects realized low power and local heating of metal nanosheet sensors, enabling the integration of sensors with different operating temperatures. Based on different resistance changes in Pt and PtRh nanosheets toward H2 and NH3, the concentration of each gas was detected from a gas mixture by consuming around 1-mW power. For decreasing the power consumption and further integration of sensors, sensor scaling and pulsed operations were numerically and experimentally studied. In addition to good connectivity of metal nanosheet sensors to large-scale integration (LSI) circuits, improvements of the power consumption by sensor scaling were proven. The pulsed operations required for integrated sensor arrays maintained a sensor response, or a resistance change, of approximately 60%, even when the power consumption was reduced by 20%.

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Papers, etc., Registered in KOARA 【 Display / hide

Presentations 【 Display / hide

  • Voltage-Boosting Wireless Power Delivery System With Fast Load Tracker by ΔΣ-Modulated Sub-Harmonic Resonant Switching

    Ryota Shinoda, Kazutoshi Tomita, Yuya Hasegawa, and Hiroki Ishikuro

    2012 IEEE International Solid-State Circuits Conference (ISSCC) (San Francisco, USA) , 2012.02, Oral Presentation(general), IEEE

  • A 0.7V 4.1mW 850Mbps/ch Inductive-Coupling Transceiver with Adaptive Pulse Width Controller in 65nm CMOS

    Takeshi Matsubara, Isamu Hayashi, Abul Hasan Johari, Tadahiro Kuroda, and Hiroki Ishikuro

    2012 IEEE Radio and Wireless Symposium(RWS (Santa Clara, California, USA) , 2012.01, Oral Presentation(general), IEEE

  • 1W 3.3V-to-16.3V Boosting Wireless Power Transfer Circuits with Vector Summing Power Controller

    Kazutoshi Tomita, Ryota Shinoda, Tadahiro Kuroda, and Hiroki Ishikuro

    IEEE Asian Solid-State Circuits Conference (ASSCC) (Jeju, Korea) , 2011.11, Oral Presentation(general), IEEE

  • A 40nm 50S/S - 8MS/S Ultra Low-Voltage SAR ADC with Timing Optimized Asynchronous Clock Generator

    R.Sekimoto, A.Shikata, T.Kuroda, H.Ishikuro

    37th Solid-State Circuits Conference (ESSCIRC) (Helsinki, Finland) , 2011.09, Oral Presentation(general), IEEE

  • A 0.5V 1.1MS/sec 6.3fJ/conversion-step SAR-ADC with Tri-Level Comparator in 40nm CMOS

    Akira Shikata, Ryota Sekimoto, Tadahiro Kuroda, and Hiroki Ishikuro

    VLSIシンポジウム報告会 (東京) , 2011.07, Oral Presentation(general), IEEE

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Intellectual Property Rights, etc. 【 Display / hide

  • 半導体集積回路装置およびそれを用いた無線通信装置

    Application No.: 2005-362281  2005.12 

    Announcement No.: 2006-197571  2006.07 

    Patent, Joint, National application

  • 半導体装置

    Application No.: 2004-252795  2004.08 

    Announcement No.: 2006-74212  2006.03 

    Patent, Joint, National application

  • 半導体集積回路装置

    Application No.: 2002-108081  2004.04 

    Announcement No.: 2003-304167  2003.10 

    Patent, Joint, National application

  • FMディジタル復調器

    Application No.: 2001-220801  2001.07 

    Announcement No.: 2003-37442  2003.02 

    Patent, National application

  • 適応型イメージ除去ミキサ

    Registration No.: 6859648  2005.02

    Patent, Joint, PCT international application

Awards 【 Display / hide

  • LSI IPデザインアワード

    ISHIKURO HIROKI, 2007.04, 財団法人 電気・電子情報学術振興財団, 磁界結合パルス伝送方式を用いた高速無線インターフェースの設計とファームウェアデバッグシステムへの応用

    Type of Award: Awards of Publisher, Newspaper Company and Foundation

 

Courses Taught 【 Display / hide

  • RECITATION IN ELECTRONICS AND INFORMATION ENGINEERING

    2021

  • LSI CIRCUIT DESIGN 2

    2021

  • LIBERAL ARTS AND SCIENCES SEMINAR 2

    2021

  • LABORATORIES IN ELECTRONICS AND INFORMATION ENGINEERING(1)

    2021

  • INDEPENDENT STUDY ON INTEGRATED DESIGN ENGINEERING

    2021

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Memberships in Academic Societies 【 Display / hide

  • 電子情報通信学会, 

    2007.06
    -
    Present
  • Symposium on VLSI Circuits, 

    2006.09
    -
    Present
  • IEEE Solid-State Circuits Society, 

    2006.06
    -
    Present
  • IEICE英文論文誌C, 

    2006.04
    -
    Present
  • JJAP SSDM特集号, 

    2002.10
    -
    2004.02

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Committee Experiences 【 Display / hide

  • 2007.06
    -
    Present

    Editor, 電子情報通信学会

  • 2006.09
    -
    Present

    Program commitee member, Symposium on VLSI Circuits

  • 2006.06
    -
    Present

    Member, IEEE Solid-State Circuits Society

  • 2006.04
    -
    Present

    Editor, IEICE英文論文誌C

     View Remarks

    2007年4月号 特集号

  • 2002.10
    -
    2004.02

    Editor, JJAP SSDM特集号

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