Amano, Hideharu

写真a

Affiliation

Faculty of Science and Technology, Department of Information and Computer Science (Yagami)

Position

Professor

Related Websites

External Links

Career 【 Display / hide

  • 1985.04
    -
    1989.03

    大学助手(理工学部電気工学科)

  • 1989.04
    -
    1994.03

    大学専任講師(理工学部電気工学科)

  • 1989.10
    -
    1990.09

    Stanford大学 ,訪問講師

  • 1994.04
    -
    1996.03

    大学助教授(理工学部電気工学科)

  • 1996.04
    -
    2001.03

    大学助教授(理工学部情報工学科)

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Academic Background 【 Display / hide

  • 1981.03

    Keio University, Faculty of Engineering, 電気工学科

    University, Graduated

  • 1983.03

    Keio University, Graduate School, Division of Engineering, 電気工学専攻

    Graduate School, Completed, Master's course

  • 1986.03

    Keio University, Graduate School, Division of Engineering, 電気工学専攻

    Graduate School, Completed, Doctoral course

Academic Degrees 【 Display / hide

  • 工学 , Keio University, 1986.03

 

Research Areas 【 Display / hide

  • Theory of informatics (Computer Science)

Research Themes 【 Display / hide

  • Parallel Computer Architecture Reconfigurable System, 

     

     View Summary

    SAN, RHiNET, Virtual Hardware, Dynamic Adaptive hardware, DRP

 

Books 【 Display / hide

  • FPGAの原理と構成

    AMANO HIDEHARU, オーム社, 2016.04

  • ディジタル回路設計とコンピュータアーキテクチャ ARM版

    AMANO HIDEHARU, SiBアクセス, 2016.04

  • Computer Architecture, A Quantitative Approach

    J.L.Hennessy and D.A.Patterson, 翔泳社, 2014.03

  • CMOS VLSI Design

    N.H.E.Weste, D.M.Harris, 丸善出版, 2014.01

    Scope: 10章、付録

  • マンガでわかるディジタル回路

    AMANO HIDEHARU, オーム社, 2013.12

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Papers 【 Display / hide

  • Accelerator-in-Switch: a framework for tightly couple switching hub and an accelerator with FPGA

    Chiharu Tsuruta, Takahiro Kaneda, Naoki Nishikawa, Hideharu Amano

    International Conference on Filed Programmable Logic and Applications  2018.09

    Research paper (international conference proceedings), Joint Work, Accepted

  • Implementation of Bitsliced AES Encryption on CUDA-Enabled GPU

    Naoki Nishikawa, Hideharu Amano, Keisuke Iwai

    International Conference on Network and System Security  2018.08

    Research paper (international conference proceedings), Joint Work, Accepted

  • Optimization of Body Biasing for Variable Pipelined Coarse Grained Reconfigurable Architecture

    Takuya Kojima, Naoki Ando, Anh Vu Doan, Hideharu Amano

    IEICE Transactions on Information and Systems E10-D ( 6 )  2018.08

    Research paper (scientific journal), Joint Work, Accepted

     View Summary

    CGRAの電力最適化をパイプライン構造の最適化により実現する

  • Digitally Assisted On-Chip Body Bias Tuning Scheme for Ultra Low-Power VLSI systems

    Okuhara Hayate, Ben Ahmed Akram, Hideharu Amano

    IEEE Transactions on Circuits and Systems I: Regular Papers  2018.08

    Research paper (scientific journal), Joint Work, Accepted

     View Summary

    Body Biasを用いてディジタルシステムの性能を自動チューニングする方法の提案

  • Asymmetric Body Bias Control with Low-Power FD-SOI Technologies: Modeling and Power Optimization

    Hayate Okuhara, A.Ben Arhmed , J.M.Muehn, Hideharu Amano

    IEEE Transactions on VLSI Systems  2018.08

    Research paper (scientific journal), Joint Work

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Papers, etc., Registered in KOARA 【 Display / hide

Presentations 【 Display / hide

  • Zynq Cluster for CFD Parametric Survey

    AMANO HIDEHARU

    the International Symposium on Applied Reconfigurable Computing (ARC) (Lio De Janeiro) , 2016.02, Oral Presentation(general)

  • Randomizing Packet Memory Networks for Low-latency Processor-memory Communication

    AMANO HIDEHARU

    The 24th Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP) (Crete) , 2016.02, Oral Presentation(general), IEEE

  • Power Optimization considering the chip temperature of low power reconfigurable accelerator CMA-SOTB

    AMANO HIDEHARU

    he 4rd International Symposium on Computing and Networking (CANDAR), 2015.12, Oral Presentation(general), IEICE

  • A 297MOPS/0.4mW Ultra Low Power Coarse-grained Reconfigurable Accelerator CMA-SOTB-2

    AMANO HIDEHARU

    The 10th International Conference on ReConFigurable Computing and FPGAs (IEEE) , 2015.12, Oral Presentation(general)

  • On-Chip Decentralized Routers with Balanced Pipelines for Avoiding Interconnect Bottleneck

    AMANO HIDEHARU

    the 9th ACM/IEEE International Symposium on Networks-on-Chip (NOCS) (Banqueber) , 2015.10, Oral Presentation(general)

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Research Projects of Competitive Funds, etc. 【 Display / hide

  • Stacking methods with chip bridges for a building block computing system

    2018.04
    -
    2021.03

    MEXT,JSPS, Grant-in-Aid for Scientific Research, 天野 英晴, Grant-in-Aid for Scientific Research (B), Principal Investigator

  • A Study on Building-Block Computing Systems using Inductive Coupling Interconnect

    2013.05
    -
    2018.03

    MEXT,JSPS, Grant-in-Aid for Scientific Research, 天野 英晴, Grant-in-Aid for Scientific Research (S), Principal Investigator

Awards 【 Display / hide

  • 電子情報通信学会フェロー

    2015.09

  • ISS功績賞

    2014.05, 電子情報通信学会

    Type of Award: Awards of National Conference, Council and Symposium

  • Best Paper Award

    松谷、鯉渕、天野, 2008.05, IPSJ, Network-on-ChipにおけるFat H-Treeトポロジに関する研究

    Type of Award: Awards of National Conference, Council and Symposium.  Country: 日本

  • Best Paper Award

    柴田、宇野、天野, 2003.05, IEICE, Implementing of a Virtual Hardware on DRL

    Type of Award: Awards of National Conference, Council and Symposium

  • 情報処理学会坂井記念学術賞

    天野 英晴, 1997, 情報処理学会

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Courses Taught 【 Display / hide

  • RECITATION IN INFORMATION AND COMPUTER SCIENCE

    2020

  • INDEPENDENT STUDY ON SCIENCE FOR OPEN AND ENVIRONMENTAL SYSTEMS

    2020

  • GRADUATE RESEARCH ON SCIENCE FOR OPEN AND ENVIRONMENTAL SYSTEMS 2

    2020

  • GRADUATE RESEARCH ON SCIENCE FOR OPEN AND ENVIRONMENTAL SYSTEMS 1

    2020

  • ELECTRONIC CIRCUIT BASIC

    2020

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Social Activities 【 Display / hide

  • ASP Design Automation Conference 2000

    1998
    -
    Present
  • Japanese FPGA/PLD Conference and Exhibit

    1998
    -
    Present
  • Cool Chips 1999

    1998
    -
    Present
  • ASP Design Automation Conference 1998

    1997
    -
    Present
  • IASTED International Conference of Applied Informa

    1997
    -
    1998

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Memberships in Academic Societies 【 Display / hide

  • 電子情報通信学会コンピュータシステム研究専門委員会, 

    2011.05
    -
    Present
  • First international workshop on highly-efficient accelerators and reconfigurable technologies (HEART), 

    2010
    -
    Present
  • Cool Chips, 

    2009
    -
    Present
  • International Symposium on Applied Reconfigurable Computing, 

    2008.03
    -
    Present
  • International Conference on Field Programmable Technology, 

    2007.12
    -
    Present

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Committee Experiences 【 Display / hide

  • 2015.10
    -
    Present

    General Chair, IEEE/ACM International Symposium on Networks on Chip (NOCS) 2016

  • 2015.05
    -
    Present

    FIT実行委員長, 電子情報通信学会、情報処理学会

  • 2015.05
    -
    Present

    ISS副会長, 電子情報通信学会

  • 2015.05
    -
    2016.03

    全国大会プログラム委員長, 情報処理学会

  • 2011.05
    -
    2013.05

    専門委員長, 電子情報通信学会コンピュータシステム研究専門委員会

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