日本語
KEIO UNIVERSITY 
Faculty of Science and Technology 
Department of Information and Computer Science 

顔写真 Professor 
AMANO HIDEHARU 

Year of Birth:1958  
http://www.am.ics.keio.ac.jp/  

Link to J-GLOBAL(Japanese Only) ]

Academic Background
Keio University  Faculty of Engineering  電気工学科  1981/03/31  Graduated 
Keio University  Graduate School, Division of Engineering  電気工学専攻  Master's course  1983/03/31  Completed 
Keio University  Graduate School, Division of Engineering  電気工学専攻  Doctoral course  1986/03/31  Completed 

Academic Degrees
工学   Keio University  1986/03/31 

Academic Awards
電子情報通信学会フェロー  2015/09/09 
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Research Areas
Computer Science 

Research Themes
Parallel Computer Architecture Reconfigurable System  SAN, RHiNET, Virtual Hardware, Dynamic Adaptive hardware, DRP 

Research Achievements (Books)
FPGAの原理と構成  AMANO HIDEHARU  オーム社  2016/04/30 
ディジタル回路設計とコンピュータアーキテクチャ ARM版  AMANO HIDEHARU  SiBアクセス  2016/04/01 
Computer Architecture, A Quantitative Approach  J.L.Hennessy and D.A.Patterson  翔泳社  2014/03 
CMOS VLSI Design  N.H.E.Weste, D.M.Harris  10章、付録  丸善出版  2014/01 
マンガでわかるディジタル回路  AMANO HIDEHARU  オーム社  2013/12 
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Research Achievements (Original Articles and Commentaries)
Research paper (international conference proceedings)  Joint  Accelerator-in-Switch: a framework for tightly couple switching hub and an accelerator with FPGA  Chiharu Tsuruta, Takahiro Kaneda, Naoki Nishikawa, Hideharu Amano  International Conference on Filed Programmable Logic and Applications  2018/09 
Research paper (international conference proceedings)  Joint  Implementation of Bitsliced AES Encryption on CUDA-Enabled GPU  Naoki Nishikawa, Hideharu Amano, Keisuke Iwai  International Conference on Network and System Security  2018/08 
Research paper (scholarly journal)  Joint  Asymmetric Body Bias Control with Low-Power FD-SOI Technologies: Modeling and Power Optimization  Hayate Okuhara, A.Ben Arhmed , J.M.Muehn, Hideharu Amano  IEEE Transactions on VLSI Systems  2018/08  10.1109/TVLSI.2018.2812893 
Research paper (scholarly journal)  Joint  Digitally Assisted On-Chip Body Bias Tuning Scheme for Ultra Low-Power VLSI systems  Okuhara Hayate, Ben Ahmed Akram, Hideharu Amano  IEEE Transactions on Circuits and Systems I: Regular Papers  2018/08  10.1109/TCSI.2018.2811504 
Research paper (scholarly journal)  Joint  Optimization of Body Biasing for Variable Pipelined Coarse Grained Reconfigurable Architecture  Takuya Kojima, Naoki Ando, Anh Vu Doan, Hideharu Amano  IEICE Transactions on Information and Systems  E10-D/ 6  2018/08 
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Research Achievements (Oral/Poster Presentations)
Oral presentation(general)  Zynq Cluster for CFD Parametric Survey  the International Symposium on Applied Reconfigurable Computing (ARC)  2016/02 
Oral presentation(general)  Randomizing Packet Memory Networks for Low-latency Processor-memory Communication  The 24th Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP)  2016/02 
Oral presentation(general)  Power Optimization considering the chip temperature of low power reconfigurable accelerator CMA-SOTB  he 4rd International Symposium on Computing and Networking (CANDAR)  2015/12 
Oral presentation(general)  A 297MOPS/0.4mW Ultra Low Power Coarse-grained Reconfigurable Accelerator CMA-SOTB-2  The 10th International Conference on ReConFigurable Computing and FPGAs  2015/12 
Oral presentation(general)  On-Chip Decentralized Routers with Balanced Pipelines for Avoiding Interconnect Bottleneck  the 9th ACM/IEEE International Symposium on Networks-on-Chip (NOCS)  2015/10 
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Awards
ISS功績賞  2014/05 
Best Paper Award  Network-on-ChipにおけるFat H-Treeトポロジに関する研究  2008/05/01 
Best Paper Award  Implementing of a Virtual Hardware on DRL  2003/05/01 
情報処理学会坂井記念学術賞  1997 
情報処理学会論文賞  「多重出力可能なMINの性能評価」により  1995 
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Social Activities
ASP Design Automation Conference 2000  1998-Present 
Cool Chips 1999  1998-Present 
Japanese FPGA/PLD Conference and Exhibit  1998-Present 
ASP Design Automation Conference 1998  1997-Present 
IASTED International Conference of Applied Informa  1997-1998 
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Memberships in Academic Societies
電子情報通信学会コンピュータシステム研究専門委員会  2011/05/01-Present 
First international workshop on highly-efficient accelerators and reconfigurable technologies (HEART)  2010-Present 
Cool Chips  2009-Present 
International Symposium on Applied Reconfigurable Computing  2008/03/01-Present 
International Conference on Field Programmable Technology  2007/12/01-Present 
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Committee Experiences
IEEE/ACM International Symposium on Networks on Chip (NOCS) 2016  General Chair  2015/10-Present 
First international workshop on highly-efficient accelerators and reconfigurable technologies (HEART)  OC Chair  2010/05-2011/05 
Cool Chips  Vice Chair  2009-Present 
International Symposium on Applied Reconfigurable Computing  SC Member  2008/03/01-Present 
International Conference on Field Programmable Technology  SC member  2007/12/01-Present 
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  Link to KOARA(Japanese Only) About KOARA(KeiO Associated Repository of Academic resources)(Japanese Only)
  About KOARA(KeiO Associated Repository of Academic resources)(Japanese Only)